DE69317342T2 - Leiterplatte aus Aluminiumnitrid und Verfahren zu ihrer Herstellung - Google Patents

Leiterplatte aus Aluminiumnitrid und Verfahren zu ihrer Herstellung

Info

Publication number
DE69317342T2
DE69317342T2 DE69317342T DE69317342T DE69317342T2 DE 69317342 T2 DE69317342 T2 DE 69317342T2 DE 69317342 T DE69317342 T DE 69317342T DE 69317342 T DE69317342 T DE 69317342T DE 69317342 T2 DE69317342 T2 DE 69317342T2
Authority
DE
Germany
Prior art keywords
manufacture
circuit board
printed circuit
aluminum nitride
nitride printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69317342T
Other languages
English (en)
Other versions
DE69317342D1 (de
Inventor
Michio Horiuchi
Koichiro Hayashi
Yoichi Harayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP26292892A external-priority patent/JP3171695B2/ja
Priority claimed from JP26673592A external-priority patent/JPH0697630A/ja
Priority claimed from JP4299192A external-priority patent/JPH06125153A/ja
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Publication of DE69317342D1 publication Critical patent/DE69317342D1/de
Application granted granted Critical
Publication of DE69317342T2 publication Critical patent/DE69317342T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867Applying pastes or inks, e.g. screen printing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0302Properties and characteristics in general
    • H05K2201/0317Thin film conductor layer; Thin film passive component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09909Special local insulating pattern, e.g. as dam around component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/025Abrading, e.g. grinding or sand blasting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1377Protective layers
    • H05K2203/1383Temporary protective insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/245Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
DE69317342T 1992-09-05 1993-09-03 Leiterplatte aus Aluminiumnitrid und Verfahren zu ihrer Herstellung Expired - Fee Related DE69317342T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP26292892A JP3171695B2 (ja) 1992-09-05 1992-09-05 窒化アルミニウム回路基板の製造方法
JP26673592A JPH0697630A (ja) 1992-09-09 1992-09-09 窒化アルミニウム回路基板及びその製造方法
JP4299192A JPH06125153A (ja) 1992-10-12 1992-10-12 窒化アルミニウム回路基板及びその製造方法

Publications (2)

Publication Number Publication Date
DE69317342D1 DE69317342D1 (de) 1998-04-16
DE69317342T2 true DE69317342T2 (de) 1998-07-09

Family

ID=27335181

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69317342T Expired - Fee Related DE69317342T2 (de) 1992-09-05 1993-09-03 Leiterplatte aus Aluminiumnitrid und Verfahren zu ihrer Herstellung

Country Status (5)

Country Link
US (1) US5464950A (de)
EP (1) EP0587382B1 (de)
CA (1) CA2105448A1 (de)
DE (1) DE69317342T2 (de)
HK (1) HK1007386A1 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07245482A (ja) * 1994-03-03 1995-09-19 Shinko Electric Ind Co Ltd セラミック回路基板及びその製造方法
US5919546A (en) * 1995-06-22 1999-07-06 Shinko Electric Industries Co. Ltd. Porous ceramic impregnated wiring body
JP3927250B2 (ja) * 1995-08-16 2007-06-06 イー・アイ・デュポン・ドウ・ヌムール・アンド・カンパニー 窒化アルミニウム基板用厚膜導体ペースト組成物
JP3845925B2 (ja) * 1996-02-05 2006-11-15 住友電気工業株式会社 窒化アルミニウム基材を用いた半導体装置用部材及びその製造方法
US5977636A (en) * 1997-01-17 1999-11-02 Micron Technology, Inc. Method of forming an electrically conductive contact plug, method of forming a reactive or diffusion barrier layer over a substrate, integrated circuitry, and method of forming a layer of titanium boride
US6124635A (en) * 1997-03-21 2000-09-26 Honda Giken Kogyo Kabushiki Kaisha Functionally gradient integrated metal-ceramic member and semiconductor circuit substrate application thereof
US6720501B1 (en) 1998-04-14 2004-04-13 Formfactor, Inc. PC board having clustered blind vias
US6270601B1 (en) * 1998-11-02 2001-08-07 Coorstek, Inc. Method for producing filled vias in electronic components
JP2001244376A (ja) * 2000-02-28 2001-09-07 Hitachi Ltd 半導体装置
JP3639226B2 (ja) * 2001-07-05 2005-04-20 松下電器産業株式会社 半導体集積回路装置、実装基板および実装体
DE10205450A1 (de) * 2002-02-08 2003-08-28 Infineon Technologies Ag Schaltungsträger und Herstellung desselben
US20050013989A1 (en) * 2002-05-28 2005-01-20 Yoshiyuki Hirose Aluminum nitride sintered compact having metallized layer and method for preparation thereof
US20070023388A1 (en) * 2005-07-28 2007-02-01 Nair Kumaran M Conductor composition for use in LTCC photosensitive tape on substrate applications
US7582958B2 (en) * 2005-12-08 2009-09-01 International Rectifier Corporation Semiconductor package
KR100757910B1 (ko) * 2006-07-06 2007-09-11 삼성전기주식회사 매립패턴기판 및 그 제조방법
AU2007355605B2 (en) * 2007-06-25 2012-04-26 Second Sight Medical Products, Inc. Method for providing hermetic electrical feedthrough
JP5693940B2 (ja) * 2010-12-13 2015-04-01 株式会社トクヤマ セラミックスビア基板、メタライズドセラミックスビア基板、これらの製造方法
EP2715788A1 (de) * 2011-06-01 2014-04-09 E. I. Du Pont de Nemours and Company Niedertemperatur-einbrand-keramikstruktur für hochfrequenzanwendungen und verfahren zu seiner herstellung
US9413136B1 (en) 2015-07-08 2016-08-09 Trumpf Photonics, Inc. Stepped diode laser module with cooling structure
JP6614240B2 (ja) * 2015-09-18 2019-12-04 株式会社村田製作所 セラミック多層基板
CN105244324B (zh) * 2015-11-10 2017-09-29 河北中瓷电子科技有限公司 电子封装用陶瓷绝缘子及其制作方法
JP6526888B1 (ja) * 2018-08-01 2019-06-05 Jx金属株式会社 セラミックス層と銅粉ペースト焼結体の積層体

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6315866A (ja) * 1986-07-07 1988-01-22 Copal Co Ltd 厚膜ペ−スト用導電性組成物
JPS63244521A (ja) * 1987-03-30 1988-10-12 株式会社村田製作所 窒化アルミニウム焼結体用導電ペ−スト
US4906404A (en) * 1988-11-07 1990-03-06 Dai-Ichi Kogyo Seiyaku Co., Ltd. Copper conductor composition
JP2765885B2 (ja) * 1988-11-14 1998-06-18 新光電気工業株式会社 窒化アルミニウム回路基板及びその製造方法
JP2629325B2 (ja) * 1988-12-13 1997-07-09 富士通株式会社 AlN多層基板の製造方法
JPH0346705A (ja) * 1989-07-14 1991-02-28 Showa Denko Kk 銅ペースト
JP2747494B2 (ja) * 1990-02-19 1998-05-06 富士通株式会社 窒化アルミニウム基板の製造方法
JP2692332B2 (ja) * 1990-03-27 1997-12-17 富士通株式会社 窒化アルミニウム基板の製造方法
JP2881018B2 (ja) * 1990-05-23 1999-04-12 イビデン株式会社 セラミックス基板の製造方法
JPH0817273B2 (ja) * 1990-09-10 1996-02-21 富士通株式会社 多層セラミック基板およびその製造方法

Also Published As

Publication number Publication date
EP0587382A3 (de) 1994-11-23
DE69317342D1 (de) 1998-04-16
US5464950A (en) 1995-11-07
EP0587382A2 (de) 1994-03-16
HK1007386A1 (en) 1999-04-09
CA2105448A1 (en) 1994-03-06
EP0587382B1 (de) 1998-03-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee