DE69227086T2 - Verfahren zur Herstellung einer dielektrischen BPSG-Zwischenschicht einer Halbleitervorrichtung - Google Patents

Verfahren zur Herstellung einer dielektrischen BPSG-Zwischenschicht einer Halbleitervorrichtung

Info

Publication number
DE69227086T2
DE69227086T2 DE69227086T DE69227086T DE69227086T2 DE 69227086 T2 DE69227086 T2 DE 69227086T2 DE 69227086 T DE69227086 T DE 69227086T DE 69227086 T DE69227086 T DE 69227086T DE 69227086 T2 DE69227086 T2 DE 69227086T2
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor device
dielectric interlayer
bpsg dielectric
bpsg
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69227086T
Other languages
English (en)
Other versions
DE69227086D1 (de
Inventor
Changgyu Kim
Changki Hong
Uin Chung
Yongchul Ahn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of DE69227086D1 publication Critical patent/DE69227086D1/de
Publication of DE69227086T2 publication Critical patent/DE69227086T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02343Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a liquid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604Deposition from a gas or vapour
    • H01L21/31625Deposition of boron or phosphorus doped silicon oxide, e.g. BSG, PSG, BPSG
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76826Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02131Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being halogen doped silicon oxides, e.g. FSG
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Glass Compositions (AREA)
DE69227086T 1991-10-30 1992-10-28 Verfahren zur Herstellung einer dielektrischen BPSG-Zwischenschicht einer Halbleitervorrichtung Expired - Lifetime DE69227086T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910019176A KR940009599B1 (ko) 1991-10-30 1991-10-30 반도체 장치의 층간 절연막 형성방법

Publications (2)

Publication Number Publication Date
DE69227086D1 DE69227086D1 (de) 1998-10-29
DE69227086T2 true DE69227086T2 (de) 1999-04-15

Family

ID=19321990

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69227086T Expired - Lifetime DE69227086T2 (de) 1991-10-30 1992-10-28 Verfahren zur Herstellung einer dielektrischen BPSG-Zwischenschicht einer Halbleitervorrichtung

Country Status (7)

Country Link
US (1) US5405489A (de)
EP (1) EP0540321B1 (de)
JP (1) JP2533440B2 (de)
KR (1) KR940009599B1 (de)
CN (1) CN1028817C (de)
DE (1) DE69227086T2 (de)
TW (1) TW201363B (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10153176A1 (de) * 2001-08-24 2003-03-13 Schott Glas Packaging von Bauelementen mit sensorischen Eigenschaften mit einer strukturierbaren Abdichtungsschicht
DE10222964A1 (de) * 2002-04-15 2003-11-06 Schott Glas Verfahren zur Gehäusebildung bei elektronischen Bauteilen sowie so hermetisch verkapselte elektronische Bauteile

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5652187A (en) * 1991-10-30 1997-07-29 Samsung Electronics Co., Ltd. Method for fabricating doped interlayer-dielectric film of semiconductor device using a plasma treatment
US5474955A (en) * 1993-08-06 1995-12-12 Micron Technology, Inc. Method for optimizing thermal budgets in fabricating semconductors
JPH0817174B2 (ja) * 1993-11-10 1996-02-21 キヤノン販売株式会社 絶縁膜の改質方法
KR960019570A (ko) * 1994-11-02 1996-06-17 김주용 불순물 함유 절연막의 흡습 방지 방법
US6489255B1 (en) * 1995-06-05 2002-12-03 International Business Machines Corporation Low temperature/low dopant oxide glass film
KR0172039B1 (ko) * 1995-06-30 1999-03-30 김주용 보론 포스포러스 실리케이트 글래스막 형성방법
TW293152B (en) * 1995-07-28 1996-12-11 Hitachi Ltd Semiconductor integrated circuit device and fabricating method thereof
TW304297B (de) * 1995-09-29 1997-05-01 Intel Corp
KR0170270B1 (ko) * 1995-12-30 1999-03-30 김광호 인규산화유리층에 형성된 콘택트 홀의 프로파일 개선 방법
US6013583A (en) * 1996-06-25 2000-01-11 International Business Machines Corporation Low temperature BPSG deposition process
US6413870B1 (en) 1996-09-30 2002-07-02 International Business Machines Corporation Process of removing CMP scratches by BPSG reflow and integrated circuit chip formed thereby
KR19980033871A (ko) * 1996-11-02 1998-08-05 김광호 반도체 장치의 제조 방법
US5913131A (en) * 1996-11-14 1999-06-15 Advanced Micro Devices, Inc. Alternative process for BPTEOS/BPSG layer formation
KR100462368B1 (ko) * 1996-12-28 2005-04-06 매그나칩 반도체 유한회사 반도체소자의제조방법
US5783493A (en) * 1997-01-27 1998-07-21 Taiwan Semiconductor Manufacturing Company Ltd. Method for reducing precipitate defects using a plasma treatment post BPSG etchback
GB2322734A (en) * 1997-02-27 1998-09-02 Nec Corp Semiconductor device and a method of manufacturing the same
KR100485186B1 (ko) * 1997-12-31 2005-08-24 주식회사 하이닉스반도체 반도체소자의평탄화막형성방법
US6274292B1 (en) * 1998-02-25 2001-08-14 Micron Technology, Inc. Semiconductor processing methods
US7804115B2 (en) * 1998-02-25 2010-09-28 Micron Technology, Inc. Semiconductor constructions having antireflective portions
US7314377B2 (en) * 1998-04-17 2008-01-01 Fci Americas Technology, Inc. Electrical power connector
US6268282B1 (en) * 1998-09-03 2001-07-31 Micron Technology, Inc. Semiconductor processing methods of forming and utilizing antireflective material layers, and methods of forming transistor gate stacks
US6281100B1 (en) 1998-09-03 2001-08-28 Micron Technology, Inc. Semiconductor processing methods
CN1076763C (zh) * 1998-09-09 2001-12-26 北京航空航天大学 形状记忆合金表面绝缘膜的原位制备方法及其所制备的绝缘膜
US6828683B2 (en) 1998-12-23 2004-12-07 Micron Technology, Inc. Semiconductor devices, and semiconductor processing methods
US7235499B1 (en) 1999-01-20 2007-06-26 Micron Technology, Inc. Semiconductor processing methods
US6245688B1 (en) * 1999-05-27 2001-06-12 Taiwan Semiconductor Manufacturing Company Dry Air/N2 post treatment to avoid the formation of B/P precipitation after BPSG film deposition
US7067414B1 (en) 1999-09-01 2006-06-27 Micron Technology, Inc. Low k interlevel dielectric layer fabrication methods
US6440860B1 (en) 2000-01-18 2002-08-27 Micron Technology, Inc. Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride
US20040261939A1 (en) * 2003-06-26 2004-12-30 Kimberly-Clark Worldwide, Inc. Cutting method and apparatus having a resilient insert
CN102479681A (zh) * 2010-11-30 2012-05-30 北大方正集团有限公司 半导体制造工艺中芯片回流的方法
US10998418B2 (en) 2019-05-16 2021-05-04 Cree, Inc. Power semiconductor devices having reflowed inter-metal dielectric layers

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4799992A (en) * 1985-10-31 1989-01-24 Texas Instruments Incorporated Interlevel dielectric fabrication process
US4746219A (en) * 1986-03-07 1988-05-24 Texas Instruments Incorporated Local interconnect
JPS6386426A (ja) * 1986-09-30 1988-04-16 Toshiba Corp 化合物半導体装置の製造方法
US4872947A (en) * 1986-12-19 1989-10-10 Applied Materials, Inc. CVD of silicon oxide using TEOS decomposition and in-situ planarization process
JPH02181952A (ja) * 1989-01-07 1990-07-16 Sony Corp 平坦化方法
JPH04237128A (ja) * 1991-01-22 1992-08-25 Nec Corp 半導体装置の製造方法
JPH04245630A (ja) * 1991-01-31 1992-09-02 Kawasaki Steel Corp 半導体装置の製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10153176A1 (de) * 2001-08-24 2003-03-13 Schott Glas Packaging von Bauelementen mit sensorischen Eigenschaften mit einer strukturierbaren Abdichtungsschicht
DE10222964A1 (de) * 2002-04-15 2003-11-06 Schott Glas Verfahren zur Gehäusebildung bei elektronischen Bauteilen sowie so hermetisch verkapselte elektronische Bauteile
DE10222964B4 (de) * 2002-04-15 2004-07-08 Schott Glas Verfahren zur Gehäusebildung bei elektronischen Bauteilen sowie so hermetisch verkapselte elektronische Bauteile

Also Published As

Publication number Publication date
US5405489A (en) 1995-04-11
EP0540321B1 (de) 1998-09-23
CN1073551A (zh) 1993-06-23
JPH05218009A (ja) 1993-08-27
EP0540321A1 (de) 1993-05-05
KR940009599B1 (ko) 1994-10-15
KR930008971A (ko) 1993-05-22
JP2533440B2 (ja) 1996-09-11
TW201363B (de) 1993-03-01
CN1028817C (zh) 1995-06-07
DE69227086D1 (de) 1998-10-29

Similar Documents

Publication Publication Date Title
DE69227086T2 (de) Verfahren zur Herstellung einer dielektrischen BPSG-Zwischenschicht einer Halbleitervorrichtung
DE69232432D1 (de) Verfahren zur Herstellung einer Halbleiteranordnung
DE69231803D1 (de) Verfahren zur Herstellung einer Halbleiteranordnung
DE69317800T2 (de) Verfahren zur Herstellung einer Halbleiteranordnung
DE69330980T2 (de) Verfahren zur Herstellung einer Halbleiteranordnung
DE69032773D1 (de) Verfahren zur Herstellung einer Halbleitervorrichtung
DE69015216D1 (de) Verfahren zur Herstellung einer Halbleitervorrichtung.
DE69216752D1 (de) Verfahren zur Herstellung einer Halbleiter-Scheibe
DE69613723T2 (de) Verfahren zur Herstellung einer Halbleiteranordnung mit einem Kondensator
DE69421592D1 (de) Verfahren zur Herstellung einer Halbleitervorrichtung
DE69323979T2 (de) Verfahren zur Herstellung einer Halbleitervorrichtung
DE69503532T2 (de) Verfahren zur Herstellung einer Halbleitervorrichtung
DE69232131T2 (de) Verfahren zur Herstellung einer Halbleitervorrichtung mit einer isolierenden Schicht für einen Kondensator
DE69016955D1 (de) Verfahren zur Herstellung einer Halbleiteranordnung.
DE69030709T2 (de) Verfahren zur Herstellung einer Halbleiteranordnung
DE69231653D1 (de) Verfahren zur Herstellung einer Halbleiteranordnung mit Isolierzonen
DE59608481D1 (de) Verfahren zur Herstellung einer Halbleiteranordnung mit Kondensator
DE69031702T2 (de) Verfahren zur Herstellung einer Halbleiteranordnung
DE69416808D1 (de) Verfahren zur Herstellung einer mehrschichtigen Halbleitervorrichtung
DE69326908D1 (de) Verfahren zur Herstellung einer Halbleiter-Anordnung
DE69227150T2 (de) Verfahren zur Herstellung einer Halbleiteranordnung mit einer isolierenden Seitenwand
DE69133009T2 (de) Verfahren zur Herstellung einer Halbleiteranordnung mit elektrisch isolierten Komponenten
DE69031153D1 (de) Verfahren zur Herstellung einer Halbleitervorrichtung
DE69024859D1 (de) Verfahren zur Herstellung einer Halbleitervorrichtung
DE69522413T2 (de) Verfahren zur Herstellung einer Halbleiteranordnung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
R071 Expiry of right

Ref document number: 540321

Country of ref document: EP