DE69222980D1 - Schaltung und Verfahren zum Umschalten zwischen redundanten Takten in einem Phasenregelkreis - Google Patents

Schaltung und Verfahren zum Umschalten zwischen redundanten Takten in einem Phasenregelkreis

Info

Publication number
DE69222980D1
DE69222980D1 DE69222980T DE69222980T DE69222980D1 DE 69222980 D1 DE69222980 D1 DE 69222980D1 DE 69222980 T DE69222980 T DE 69222980T DE 69222980 T DE69222980 T DE 69222980T DE 69222980 D1 DE69222980 D1 DE 69222980D1
Authority
DE
Germany
Prior art keywords
switching
circuit
locked loop
phase locked
redundant clocks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69222980T
Other languages
English (en)
Other versions
DE69222980T2 (de
Inventor
Lanny L Parker
Ahmad H Atriss
Dean William Mueller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Codex Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Codex Corp filed Critical Codex Corp
Application granted granted Critical
Publication of DE69222980D1 publication Critical patent/DE69222980D1/de
Publication of DE69222980T2 publication Critical patent/DE69222980T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
    • H03L7/143—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted by switching the reference signal of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0807—Details of the phase-locked loop concerning mainly a recovery circuit for the reference signal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S331/00—Oscillators
    • Y10S331/02—Phase locked loop having lock indicating or detecting means
DE69222980T 1991-05-28 1992-05-28 Schaltung und Verfahren zum Umschalten zwischen redundanten Takten in einem Phasenregelkreis Expired - Fee Related DE69222980T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/705,861 US5260979A (en) 1991-05-28 1991-05-28 Circuit and method of switching between redundant clocks for a phase lock loop

Publications (2)

Publication Number Publication Date
DE69222980D1 true DE69222980D1 (de) 1997-12-11
DE69222980T2 DE69222980T2 (de) 1998-05-07

Family

ID=24835257

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69222980T Expired - Fee Related DE69222980T2 (de) 1991-05-28 1992-05-28 Schaltung und Verfahren zum Umschalten zwischen redundanten Takten in einem Phasenregelkreis

Country Status (6)

Country Link
US (1) US5260979A (de)
EP (1) EP0517431B1 (de)
JP (1) JPH05206846A (de)
DE (1) DE69222980T2 (de)
HK (1) HK1004637A1 (de)
SG (1) SG46251A1 (de)

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Also Published As

Publication number Publication date
EP0517431A1 (de) 1992-12-09
EP0517431B1 (de) 1997-11-05
HK1004637A1 (en) 1998-11-20
SG46251A1 (en) 1998-02-20
DE69222980T2 (de) 1998-05-07
US5260979A (en) 1993-11-09
JPH05206846A (ja) 1993-08-13

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Owner name: MOTOROLA INC.(N.D.GES.D. STAATES DELAWARE), SCHAUM

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Free format text: SCHUMACHER & WILLSAU, PATENTANWALTSSOZIETAET, 80335 MUENCHEN

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