HK1004637A1 - Circuit and method of switching between redundant clocks for a phase lock loop - Google Patents

Circuit and method of switching between redundant clocks for a phase lock loop

Info

Publication number
HK1004637A1
HK1004637A1 HK98103787A HK98103787A HK1004637A1 HK 1004637 A1 HK1004637 A1 HK 1004637A1 HK 98103787 A HK98103787 A HK 98103787A HK 98103787 A HK98103787 A HK 98103787A HK 1004637 A1 HK1004637 A1 HK 1004637A1
Authority
HK
Hong Kong
Prior art keywords
switching
circuit
phase lock
lock loop
redundant clocks
Prior art date
Application number
HK98103787A
Other languages
English (en)
Inventor
Lanny L Parker
Ahmad H Atriss
Dean William Mueller
Original Assignee
Codex Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Codex Corp filed Critical Codex Corp
Publication of HK1004637A1 publication Critical patent/HK1004637A1/xx

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
    • H03L7/143—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted by switching the reference signal of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0807—Details of the phase-locked loop concerning mainly a recovery circuit for the reference signal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S331/00—Oscillators
    • Y10S331/02—Phase locked loop having lock indicating or detecting means
HK98103787A 1991-05-28 1998-05-04 Circuit and method of switching between redundant clocks for a phase lock loop HK1004637A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/705,861 US5260979A (en) 1991-05-28 1991-05-28 Circuit and method of switching between redundant clocks for a phase lock loop

Publications (1)

Publication Number Publication Date
HK1004637A1 true HK1004637A1 (en) 1998-11-20

Family

ID=24835257

Family Applications (1)

Application Number Title Priority Date Filing Date
HK98103787A HK1004637A1 (en) 1991-05-28 1998-05-04 Circuit and method of switching between redundant clocks for a phase lock loop

Country Status (6)

Country Link
US (1) US5260979A (xx)
EP (1) EP0517431B1 (xx)
JP (1) JPH05206846A (xx)
DE (1) DE69222980T2 (xx)
HK (1) HK1004637A1 (xx)
SG (1) SG46251A1 (xx)

Families Citing this family (114)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5373537A (en) * 1991-09-02 1994-12-13 Siemens Aktiengesellschaft Method and apparatus for the synchronization of a clock means of a telecommunication switching system
JP3208736B2 (ja) * 1991-11-08 2001-09-17 ソニー株式会社 Ｐｌｌ回路
JPH06112817A (ja) * 1992-09-25 1994-04-22 Fujitsu Ltd Ｐｌｌ 周波数シンセサイザ回路
DE69317758T2 (de) * 1992-12-28 1998-10-29 Advanced Micro Devices Inc Mikroprozessorschaltung mit zwei Taktsignalen
US5539345A (en) * 1992-12-30 1996-07-23 Digital Equipment Corporation Phase detector apparatus
EP0614283B1 (en) * 1993-03-01 1997-10-29 Nippon Telegraph And Telephone Corporation Phase lock loop circuit using a sample and hold switch circuit
US5440313A (en) * 1993-05-27 1995-08-08 Stellar Gps Corporation GPS synchronized frequency/time source
US5394444A (en) * 1993-07-12 1995-02-28 Motorola, Inc. Lock detect circuit for detecting a lock condition in a phase locked loop and method therefor
CA2125113A1 (en) * 1993-08-31 1995-03-01 Francesco Ledda Method and circuitry for aligning the phase of high-speed clocks in telecommunications systems
US5579353A (en) * 1993-10-12 1996-11-26 Texas Instruments Incorporated Dynamic clock mode switch
WO1995010880A1 (en) * 1993-10-12 1995-04-20 Motorola Inc. Adaptive bandwidth controlled frequency synthesizer
CA2130871C (en) * 1993-11-05 1999-09-28 John M. Alder Method and apparatus for a phase-locked loop circuit with holdover mode
JP3048495B2 (ja) * 1994-01-07 2000-06-05 沖電気工業株式会社 クロック回路
US5440515A (en) * 1994-03-08 1995-08-08 Motorola Inc. Delay locked loop for detecting the phase difference of two signals having different frequencies
US5557224A (en) * 1994-04-15 1996-09-17 International Business Machines Corporation Apparatus and method for generating a phase-controlled clock signal
US5642069A (en) * 1994-04-26 1997-06-24 Unisys Corporation Clock signal loss detection and recovery apparatus in multiple clock signal system
US5515403A (en) * 1994-06-21 1996-05-07 Dsc Communications Corporation Apparatus and method for clock alignment and switching
JP2710214B2 (ja) * 1994-08-12 1998-02-10 日本電気株式会社 フェーズロックドループ回路
US5815016A (en) * 1994-09-02 1998-09-29 Xilinx, Inc. Phase-locked delay loop for clock correction
US5428317A (en) * 1994-09-06 1995-06-27 Motorola, Inc. Phase locked loop with low power feedback path and method of operation
US5455540A (en) * 1994-10-26 1995-10-03 Cypress Semiconductor Corp. Modified bang-bang phase detector with ternary output
DE4442306C2 (de) * 1994-11-28 1997-12-18 Siemens Ag Verfahren und Anordnung zur Ermittlung von Phasenänderungen eines Referenz-Eingangssignals eines Phasenregelkreises
US5828254A (en) * 1995-06-21 1998-10-27 Sony Corporation Error regulator circuit for sample and hold phase locked loops
US5576647A (en) * 1995-06-22 1996-11-19 Marvell Technology Group, Ltd. Charge pump for phase lock loop
US5887146A (en) * 1995-08-14 1999-03-23 Data General Corporation Symmetric multiprocessing computer with non-uniform memory access architecture
US5568097A (en) * 1995-09-25 1996-10-22 International Business Machines Inc. Ultra high availability clock chip
JP2830815B2 (ja) * 1996-01-26 1998-12-02 日本電気株式会社 Ｐｌｌ周波数シンセサイザ
JP3253514B2 (ja) * 1996-03-22 2002-02-04 沖電気工業株式会社 Ｐｌｌ回路におけるクロック生成回路
US5774511A (en) * 1996-04-19 1998-06-30 International Business Machines Corporation Processor clock circuit
US5757240A (en) * 1996-07-01 1998-05-26 International Business Machines Corporation Low gain voltage-controlled oscillator
EP0821486B1 (en) * 1996-07-24 2003-09-24 STMicroelectronics S.r.l. Clock circuit with master-slave synchronisation
CA2184013A1 (en) * 1996-08-23 1998-02-24 Mauricio Peres Hitless clock recovery in atm networks
US6044123A (en) * 1996-10-17 2000-03-28 Hitachi Micro Systems, Inc. Method and apparatus for fast clock recovery phase-locked loop with training capability
US5740211A (en) * 1996-11-12 1998-04-14 Lucent Technologies Inc. Method and apparatus for a hitless switch-over between redundant signals
US5949261A (en) * 1996-12-17 1999-09-07 Cypress Semiconductor Corp. Method and circuit for reducing power and/or current consumption
DE19720446A1 (de) * 1997-05-15 1998-11-19 Siemens Ag Einrasterkennungsschaltung für einen Phasenregelkreis
JP3731313B2 (ja) * 1997-09-19 2006-01-05 ソニー株式会社 クロック再生回路およびデータ伝送装置
JP4015254B2 (ja) * 1998-01-16 2007-11-28 富士通株式会社 ロック検出回路及びｐｌｌ周波数シンセサイザ
JP3171162B2 (ja) * 1998-04-02 2001-05-28 日本電気株式会社 Ｐｌｌ回路
AU7758298A (en) * 1998-04-09 1999-11-01 Nokia Networks Oy Node control unit of an access node in a telecommunications network
JP4646100B2 (ja) * 1999-08-24 2011-03-09 エスティー‐エリクソン、ソシエテ、アノニム チャージポンプフェイズロックループ回路
US6259328B1 (en) * 1999-12-17 2001-07-10 Network Equipment Technologies, Inc. Method and system for managing reference signals for network clock synchronization
US6239626B1 (en) 2000-01-07 2001-05-29 Cisco Technology, Inc. Glitch-free clock selector
US8149048B1 (en) 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US8160864B1 (en) 2000-10-26 2012-04-17 Cypress Semiconductor Corporation In-circuit emulator and pod synchronized boot
US6724220B1 (en) 2000-10-26 2004-04-20 Cyress Semiconductor Corporation Programmable microcontroller architecture (mixed analog/digital)
US7765095B1 (en) 2000-10-26 2010-07-27 Cypress Semiconductor Corporation Conditional branching in an in-circuit emulation system
US8103496B1 (en) 2000-10-26 2012-01-24 Cypress Semicondutor Corporation Breakpoint control in an in-circuit emulation system
US8176296B2 (en) 2000-10-26 2012-05-08 Cypress Semiconductor Corporation Programmable microcontroller architecture
DE10107175B4 (de) * 2001-02-15 2005-03-24 Siemens Ag Taktregenerator hoher Güte, Synchronisationsnetz und Verfahren zur Erkennung von Frquenzabweichungen innerhalb eines Synchronisationsnetzes
US6891401B2 (en) * 2001-08-03 2005-05-10 Altera Corporation Clock loss detection and switchover circuit
US6768362B1 (en) 2001-08-13 2004-07-27 Cypress Semiconductor Corp. Fail-safe zero delay buffer with automatic internal reference
US6744323B1 (en) * 2001-08-30 2004-06-01 Cypress Semiconductor Corp. Method for phase locking in a phase lock loop
US7406674B1 (en) 2001-10-24 2008-07-29 Cypress Semiconductor Corporation Method and apparatus for generating microcontroller configuration information
US8078970B1 (en) 2001-11-09 2011-12-13 Cypress Semiconductor Corporation Graphical user interface with user-selectable list-box
US8042093B1 (en) 2001-11-15 2011-10-18 Cypress Semiconductor Corporation System providing automatic source code generation for personalization and parameterization of user modules
US7844437B1 (en) 2001-11-19 2010-11-30 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
US7770113B1 (en) 2001-11-19 2010-08-03 Cypress Semiconductor Corporation System and method for dynamically generating a configuration datasheet
US8069405B1 (en) 2001-11-19 2011-11-29 Cypress Semiconductor Corporation User interface for efficiently browsing an electronic document using data-driven tabs
US6971004B1 (en) 2001-11-19 2005-11-29 Cypress Semiconductor Corp. System and method of dynamically reconfiguring a programmable integrated circuit
US7774190B1 (en) 2001-11-19 2010-08-10 Cypress Semiconductor Corporation Sleep and stall in an in-circuit emulation system
US6563386B1 (en) * 2001-12-07 2003-05-13 Texas Instruments Incorporated Self-starter for PLL synthesizers
GB2383697A (en) * 2001-12-27 2003-07-02 Zarlink Semiconductor Inc Method of speeding lock of PLL
US6993306B2 (en) * 2002-01-22 2006-01-31 Broadcom Corporation Determination and processing for fractional-N programming values
US6759881B2 (en) 2002-03-22 2004-07-06 Rambus Inc. System with phase jumping locked loop circuit
US8103497B1 (en) 2002-03-28 2012-01-24 Cypress Semiconductor Corporation External interface for event architecture
US6624705B1 (en) * 2002-04-04 2003-09-23 National Semiconductor Corporation Control circuit for phase-locked loop (PLL) with reduced cycle slip during acquisition of phase lock
US6657464B1 (en) * 2002-04-25 2003-12-02 Applied Micro Circuits Corporation Method and circuit to reduce jitter generation in a PLL using a reference quadrupler, equalizer, and phase detector with control for multiple frequencies
US7308608B1 (en) 2002-05-01 2007-12-11 Cypress Semiconductor Corporation Reconfigurable testing system and method
US7761845B1 (en) 2002-09-09 2010-07-20 Cypress Semiconductor Corporation Method for parameterizing a user module
US6806751B2 (en) 2002-09-12 2004-10-19 Foundry Networks, Inc. Loop filter for a phase-locked loop and method for switching
US7053720B2 (en) * 2002-11-01 2006-05-30 Broadcom Corporation Configurable voltage controlled oscillator system and method including dividing forming a portion of two or more divider paths
KR100500925B1 (ko) * 2002-11-27 2005-07-14 주식회사 하이닉스반도체 디지털 위상 혼합기를 갖는 2 코스 하프 딜레이 라인을이용한로우 지터 ｄｌｌ
JP4155062B2 (ja) * 2003-03-03 2008-09-24 セイコーエプソン株式会社 クロック整形器とこれを用いた電子機器
US6970045B1 (en) * 2003-06-25 2005-11-29 Nel Frequency Controls, Inc. Redundant clock module
JP2005252354A (ja) * 2004-03-01 2005-09-15 Seiko Epson Corp クロック信号の出力方法、クロック整形器およびクロック整形器を用いた電子機器
US7295049B1 (en) 2004-03-25 2007-11-13 Cypress Semiconductor Corporation Method and circuit for rapid alignment of signals
US7676530B2 (en) * 2004-06-03 2010-03-09 Hewlett-Packard Development Company, L.P. Duration minimum and maximum circuit for performance counter
US20050283669A1 (en) * 2004-06-03 2005-12-22 Adkisson Richard W Edge detect circuit for performance counter
US7624319B2 (en) * 2004-06-03 2009-11-24 Hewlett-Packard Development Company, L.P. Performance monitoring system
US8069436B2 (en) 2004-08-13 2011-11-29 Cypress Semiconductor Corporation Providing hardware independence to automate code generation of processing device firmware
US8286125B2 (en) 2004-08-13 2012-10-09 Cypress Semiconductor Corporation Model for a hardware device-independent method of defining embedded firmware for programmable systems
US7332976B1 (en) 2005-02-04 2008-02-19 Cypress Semiconductor Corporation Poly-phase frequency synthesis oscillator
US20060193417A1 (en) * 2005-02-25 2006-08-31 Tellabs Operations, Inc. Systems and methods for switching between redundant clock signals
US7400183B1 (en) 2005-05-05 2008-07-15 Cypress Semiconductor Corporation Voltage controlled oscillator delay cell and method
US8089461B2 (en) 2005-06-23 2012-01-03 Cypress Semiconductor Corporation Touch wake for electronic devices
US8085067B1 (en) 2005-12-21 2011-12-27 Cypress Semiconductor Corporation Differential-to-single ended signal converter circuit and method
US20070205835A1 (en) * 2006-01-03 2007-09-06 Eric Iozsef Robust locking/tuning in a multi-rate, multi-range phase locked loop
JP4921811B2 (ja) * 2006-03-01 2012-04-25 株式会社東芝 位相同期ループ回路及びこの位相同期ループ回路で使用される制御方法
JP4714041B2 (ja) * 2006-03-01 2011-06-29 株式会社東芝 位相同期ループ回路及びこの位相同期ループ回路の制御方法
US8067948B2 (en) 2006-03-27 2011-11-29 Cypress Semiconductor Corporation Input/output multiplexer bus
DE102006024470B4 (de) * 2006-05-24 2015-07-09 Xignal Technologies Ag Umschaltbarer Phasenregelkreis sowie Verfahren zum Betrieb eines umschaltbaren Phasenregelkreises
JP2008053832A (ja) * 2006-08-22 2008-03-06 Nec Corp クロック供給回路およびクロック供給方法
US7616063B1 (en) * 2007-03-29 2009-11-10 Scientific Components Corporation Frequency synthesizer using a phase-locked loop and single side band mixer
US8092083B2 (en) 2007-04-17 2012-01-10 Cypress Semiconductor Corporation Temperature sensor with digital bandgap
US8130025B2 (en) 2007-04-17 2012-03-06 Cypress Semiconductor Corporation Numerical band gap
US7737724B2 (en) 2007-04-17 2010-06-15 Cypress Semiconductor Corporation Universal digital block interconnection and channel routing
US8516025B2 (en) 2007-04-17 2013-08-20 Cypress Semiconductor Corporation Clock driven dynamic datapath chaining
US8026739B2 (en) 2007-04-17 2011-09-27 Cypress Semiconductor Corporation System level interconnect with programmable switching
US8040266B2 (en) 2007-04-17 2011-10-18 Cypress Semiconductor Corporation Programmable sigma-delta analog-to-digital converter
US9564902B2 (en) 2007-04-17 2017-02-07 Cypress Semiconductor Corporation Dynamically configurable and re-configurable data path
US8065653B1 (en) 2007-04-25 2011-11-22 Cypress Semiconductor Corporation Configuration of programmable IC design elements
US9720805B1 (en) 2007-04-25 2017-08-01 Cypress Semiconductor Corporation System and method for controlling a target device
US8266575B1 (en) 2007-04-25 2012-09-11 Cypress Semiconductor Corporation Systems and methods for dynamically reconfiguring a programmable system on a chip
US8049569B1 (en) 2007-09-05 2011-11-01 Cypress Semiconductor Corporation Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes
US9559881B2 (en) * 2007-12-21 2017-01-31 Altera Corporation Transceiver system with reduced latency uncertainty
US8055936B2 (en) * 2008-12-31 2011-11-08 Pitney Bowes Inc. System and method for data recovery in a disabled integrated circuit
US9448964B2 (en) 2009-05-04 2016-09-20 Cypress Semiconductor Corporation Autonomous control in a programmable system
US9401722B2 (en) * 2011-06-20 2016-07-26 Texas Instruments Incorporated Autoconfigurable phase-locked loop which automatically maintains a constant damping factor and adjusts the loop bandwidth to a constant ratio of the reference frequency
CN102957552B (zh) * 2011-08-23 2017-03-15 中兴通讯股份有限公司 时钟保护方法及装置
DE102015101745B4 (de) * 2014-02-10 2016-12-08 Analog Devices, Inc. Redundante takt-umschaltung
US9395745B2 (en) * 2014-02-10 2016-07-19 Analog Devices, Inc. Redundant clock switchover
CN107465475A (zh) * 2016-06-06 2017-12-12 中兴通讯股份有限公司 一种网络设备时钟/时间检测方法和装置
CN111010173B (zh) * 2019-12-20 2023-05-23 湖北大学 一种自适应的小数频率合成器毛刺移除系统及方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4144448A (en) * 1977-11-29 1979-03-13 International Business Machines Corporation Asynchronous validity checking system and method for monitoring clock signals on separate electrical conductors
DE2838619A1 (de) * 1978-09-05 1980-03-20 Bosch Gmbh Robert Einrichtung zum steuern von betriebsparameterabhaengigen und sich wiederholenden vorgaengen fuer brennkraftmaschinen
US4392226A (en) * 1981-09-28 1983-07-05 Ncr Corporation Multiple source clock encoded communications error detection circuit
US4600896A (en) * 1984-09-25 1986-07-15 Gte Communication Systems Corporation Circuit for limiting jitter transients during switching of phase control signals to an oscillator
US4908841A (en) * 1987-10-30 1990-03-13 Digital Equipment Corporation Data decoding circuit including phase-locked loop timing
IT1223524B (it) * 1987-12-18 1990-09-19 Honeywell Bull Spa Circuito ad aggancio di fase autotarante
GB2219451A (en) * 1988-05-31 1989-12-06 Plessey Co Plc Frequency synthesiser
US4964117A (en) * 1988-10-04 1990-10-16 Vtc Incorporated Timing synchronizing circuit for baseband data signals
EP0391144A3 (de) * 1989-04-07 1991-04-24 Siemens Aktiengesellschaft Verfahren zur Synchronisation einer Takteinrichtung eines getakteten elektrischen Systems
US4972442A (en) * 1989-04-27 1990-11-20 Northern Telecom Limited Phase-locked loop clock

Also Published As

Publication number Publication date
US5260979A (en) 1993-11-09
EP0517431B1 (en) 1997-11-05
DE69222980D1 (de) 1997-12-11
DE69222980T2 (de) 1998-05-07
JPH05206846A (ja) 1993-08-13
SG46251A1 (en) 1998-02-20
EP0517431A1 (en) 1992-12-09

Similar Documents

Publication Publication Date Title
HK1004637A1 (en) Circuit and method of switching between redundant clocks for a phase lock loop
ZA948525B (en) A phase synchronization circuit and method therefor for a phase locked loop
GB2268645B (en) A lock detection circuit for a phase lock loop
EP0326940A3 (en) A phase locked loop having a fast lock current reduction and clamping circuit
EP0140042A3 (en) Digital phase lock loop circuit
EP0415649A3 (en) Compensated phase locked loop circuit
EP0476605A3 (en) Phase lock loop circuit comprising a subsidiary loop filter
GB2278969B (en) A reduced noise phase locked loop circuit
GB9109445D0 (en) A circuit for glitch-free switching of asynchronous clock sources
GB8318888D0 (en) Phase lock loop circuit
GB2273406B (en) Phase adjustment method and apparatus for use in a clock recovery circuit
GB2289384B (en) Phase locked loop error suppression circuit and method
GB9213624D0 (en) A phase lock loop
GB2215541B (en) Phase lock recovery apparatus for phase locked loop circuit
AU5078593A (en) Clock phase adjustment between duplicated clock circuits
KR0137399B1 (en) Phase locked loop circuit
GB2147470B (en) Method and circuit for phase lock loop initialization
EP0432539A3 (en) Phase locked loop circuit
GB2289174B (en) Apparatus and method for enabling elements of a phase locked loop
GB2291293B (en) Method of generating a clock signal by means of a phase-locked loop and a phase-locked loop
EP0535591A3 (en) Phase-locked circuit capable of being quickly put in a phase locked state
GB9505123D0 (en) All digital phase-locked loop using a numerically-controlled oscillator and a method of operating same
EP0346153A3 (en) Digital phase locked loop circuit
EP0289941A3 (en) A phase locked loop having fast frequency lock steering circuit
GB9518446D0 (en) Method of gemerating a clock signal by means of a phase-locked loop and a phase-locked loop

Legal Events

Date Code Title Description
PF Patent in force
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20070528