DE69122203D1 - Ausgangseinheit in einem integrierten Halbleiterschaltkreis - Google Patents

Ausgangseinheit in einem integrierten Halbleiterschaltkreis

Info

Publication number
DE69122203D1
DE69122203D1 DE69122203T DE69122203T DE69122203D1 DE 69122203 D1 DE69122203 D1 DE 69122203D1 DE 69122203 T DE69122203 T DE 69122203T DE 69122203 T DE69122203 T DE 69122203T DE 69122203 D1 DE69122203 D1 DE 69122203D1
Authority
DE
Germany
Prior art keywords
integrated circuit
output unit
semiconductor integrated
semiconductor
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69122203T
Other languages
English (en)
Other versions
DE69122203T2 (de
Inventor
Hideo Inaba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69122203D1 publication Critical patent/DE69122203D1/de
Application granted granted Critical
Publication of DE69122203T2 publication Critical patent/DE69122203T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00346Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16Modifications for eliminating interference voltages or currents
    • H03K17/161Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
DE69122203T 1990-10-18 1991-10-10 Ausgangseinheit in einem integrierten Halbleiterschaltkreis Expired - Fee Related DE69122203T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2279752A JPH04155693A (ja) 1990-10-18 1990-10-18 半導体記憶装置のデータ出力回路

Publications (2)

Publication Number Publication Date
DE69122203D1 true DE69122203D1 (de) 1996-10-24
DE69122203T2 DE69122203T2 (de) 1997-01-30

Family

ID=17615415

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69122203T Expired - Fee Related DE69122203T2 (de) 1990-10-18 1991-10-10 Ausgangseinheit in einem integrierten Halbleiterschaltkreis

Country Status (5)

Country Link
US (1) US5357461A (de)
EP (1) EP0481678B1 (de)
JP (1) JPH04155693A (de)
KR (1) KR950008449B1 (de)
DE (1) DE69122203T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0583696A (ja) * 1991-06-07 1993-04-02 Sony Corp 画像符号化装置
JPH05236427A (ja) * 1992-02-25 1993-09-10 Sony Corp 画像信号の符号化装置及び符号化方法
US5311083A (en) * 1993-01-25 1994-05-10 Standard Microsystems Corporation Very low voltage inter-chip CMOS logic signaling for large numbers of high-speed output lines each associated with large capacitive loads
DE69705217T2 (de) * 1997-08-07 2001-09-20 St Microelectronics Srl Integrierte Anordnung für Schaltsysteme mit gefilterten Bezugsgrössen

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4376986A (en) * 1981-09-30 1983-03-15 Burroughs Corporation Double Lambda diode memory cell
JPS5921128A (ja) * 1982-07-26 1984-02-03 Nec Ic Microcomput Syst Ltd 電界効果半導体装置
JPH0714051B2 (ja) * 1986-07-15 1995-02-15 沖電気工業株式会社 半導体装置
US4797804A (en) * 1987-03-09 1989-01-10 International Business Machines Corporation High density, high performance, single event upset immune data storage cell
US4862018A (en) * 1987-11-30 1989-08-29 Texas Instruments Incorporated Noise reduction for output drivers
JP2822391B2 (ja) * 1988-06-27 1998-11-11 日本電気株式会社 半導体記憶装置
JP2855701B2 (ja) * 1989-09-29 1999-02-10 日本電気株式会社 Cmos半導体集積回路装置

Also Published As

Publication number Publication date
EP0481678B1 (de) 1996-09-18
KR920008920A (ko) 1992-05-28
US5357461A (en) 1994-10-18
DE69122203T2 (de) 1997-01-30
EP0481678A1 (de) 1992-04-22
KR950008449B1 (ko) 1995-07-31
JPH04155693A (ja) 1992-05-28

Similar Documents

Publication Publication Date Title
DE69124735D1 (de) Integrierte Halbleiterschaltung
DE69130819T2 (de) Integrierte Halbleiterschaltung
DE69231612D1 (de) Integrierte Schaltung mit programmierbarem Ausgang
DE69110535T2 (de) Eingebaute Untersetzungseinheit in einem hochintegrierten Schaltkreis.
KR890015413A (ko) 반도체 집적회로
KR900010988A (ko) 반도체 집적회로장치
KR900008673A (ko) 반도체집적회로장치
DE69117553T2 (de) Ausgangsschaltung
KR960004744B1 (en) Signal output circuit in semiconductor integrated circuit
KR890017789A (ko) 반도체 집적회로장치
DE69126848D1 (de) Integrierte Halbleiterschaltung
DE68928284D1 (de) Integrierte Halbleiterschaltung mit einem CMOS-Inverter
DE68918164D1 (de) Integrierte Halbleiterschaltung mit einem CMOS-Inverter.
DE69030575T2 (de) Integrierte Halbleiterschaltung mit einem Detektor
DE68929104T2 (de) Integrierte Halbleiterschaltung
KR900011093A (ko) 집적 회로형 반도체 소자
DE69129445T2 (de) Integrierte halbleiterschaltungsanordnung
DE69124981T2 (de) Integrierte Halbleiterschaltung
DE69122203D1 (de) Ausgangseinheit in einem integrierten Halbleiterschaltkreis
DE69118219T2 (de) ECL-Schaltung in einem integrierten Halbleiterschaltkreis
ES535167A0 (es) Perfeccionamientos en circuitos integrados
KR900011014A (ko) 반도체 집적회로장치
DE69131898T2 (de) Integrierte Halbleiterschaltung
DE68929148T2 (de) Integrierte Halbleiterschaltung
DE59108339D1 (de) Leistungs-Halbleiterschaltung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee