DE69705217T2 - Integrierte Anordnung für Schaltsysteme mit gefilterten Bezugsgrössen - Google Patents

Integrierte Anordnung für Schaltsysteme mit gefilterten Bezugsgrössen

Info

Publication number
DE69705217T2
DE69705217T2 DE69705217T DE69705217T DE69705217T2 DE 69705217 T2 DE69705217 T2 DE 69705217T2 DE 69705217 T DE69705217 T DE 69705217T DE 69705217 T DE69705217 T DE 69705217T DE 69705217 T2 DE69705217 T2 DE 69705217T2
Authority
DE
Germany
Prior art keywords
switching systems
filtered reference
integrated arrangement
reference sizes
sizes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69705217T
Other languages
English (en)
Other versions
DE69705217D1 (de
Inventor
Angelo Genova
Giuseppe Cantone
Roberto Gariboldi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69705217D1 publication Critical patent/DE69705217D1/de
Publication of DE69705217T2 publication Critical patent/DE69705217T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16Modifications for eliminating interference voltages or currents
    • H03K17/161Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26Current mirrors
    • G05F3/262Current mirrors using field-effect transistors only
DE69705217T 1997-08-07 1997-08-07 Integrierte Anordnung für Schaltsysteme mit gefilterten Bezugsgrössen Expired - Fee Related DE69705217T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP97830415A EP0896268B1 (de) 1997-08-07 1997-08-07 Integrierte Anordnung für Schaltsysteme mit gefilterten Bezugsgrössen

Publications (2)

Publication Number Publication Date
DE69705217D1 DE69705217D1 (de) 2001-07-19
DE69705217T2 true DE69705217T2 (de) 2001-09-20

Family

ID=8230752

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69705217T Expired - Fee Related DE69705217T2 (de) 1997-08-07 1997-08-07 Integrierte Anordnung für Schaltsysteme mit gefilterten Bezugsgrössen

Country Status (4)

Country Link
US (1) US6150867A (de)
EP (1) EP0896268B1 (de)
JP (1) JPH11168369A (de)
DE (1) DE69705217T2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7010246B2 (en) 2002-06-10 2006-03-07 Ricoh Company, Ltd. Image forming apparatus, drum unit, image forming module, and method of insertion and removal of a damper into and from an image carrier drum
US7190195B2 (en) * 2004-03-29 2007-03-13 Rohm Co., Ltd. Input circuit and output circuit
CN111538364B (zh) * 2020-05-15 2023-06-23 上海艾为电子技术股份有限公司 一种带隙基准电压源以及电子设备

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63234623A (ja) * 1987-03-23 1988-09-29 Toshiba Corp 半導体集積回路
JPH04155693A (ja) * 1990-10-18 1992-05-28 Nec Ic Microcomput Syst Ltd 半導体記憶装置のデータ出力回路
JPH07175535A (ja) * 1993-12-16 1995-07-14 Nec Corp Fet増幅器用電源回路
JP3561012B2 (ja) * 1994-11-07 2004-09-02 株式会社ルネサステクノロジ 半導体集積回路装置
DE19540169C1 (de) * 1995-10-27 1996-11-28 Texas Instruments Deutschland Integrierte CMOS-Schaltung mit Schaltung zur Latch-up-Verhinderung sowie Status-Speicher

Also Published As

Publication number Publication date
EP0896268A1 (de) 1999-02-10
EP0896268B1 (de) 2001-06-13
US6150867A (en) 2000-11-21
JPH11168369A (ja) 1999-06-22
DE69705217D1 (de) 2001-07-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee