KR900011014A - 반도체 집적회로장치 - Google Patents
반도체 집적회로장치Info
- Publication number
- KR900011014A KR900011014A KR1019890018676A KR890018676A KR900011014A KR 900011014 A KR900011014 A KR 900011014A KR 1019890018676 A KR1019890018676 A KR 1019890018676A KR 890018676 A KR890018676 A KR 890018676A KR 900011014 A KR900011014 A KR 900011014A
- Authority
- KR
- South Korea
- Prior art keywords
- integrated circuit
- semiconductor integrated
- circuit device
- semiconductor
- integrated
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
- G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/48—Indexing scheme relating to groups G06F7/48 - G06F7/575
- G06F2207/4802—Special implementations
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP318235 | 1988-12-16 | ||
JP63318235A JPH063839B2 (ja) | 1988-12-16 | 1988-12-16 | 半導体集積回路装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR900011014A true KR900011014A (ko) | 1990-07-11 |
KR930008981B1 KR930008981B1 (ko) | 1993-09-17 |
Family
ID=18096936
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890018676A KR930008981B1 (ko) | 1988-12-16 | 1989-12-15 | 반도체 집적회로장치 |
Country Status (3)
Country | Link |
---|---|
US (1) | US4979018A (ko) |
JP (1) | JPH063839B2 (ko) |
KR (1) | KR930008981B1 (ko) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2607735B2 (ja) * | 1990-06-20 | 1997-05-07 | 富士通株式会社 | 倍数器の部分積加算方法 |
US5072419A (en) * | 1990-11-21 | 1991-12-10 | Sun Microsystems, Inc. | Binary tree multiplier constructed of carry save adders having an area efficient floor plan |
JPH05121547A (ja) * | 1991-10-25 | 1993-05-18 | Nec Corp | 半導体集積回路の配線処理方法 |
US6066178A (en) * | 1996-04-10 | 2000-05-23 | Lsi Logic Corporation | Automated design method and system for synthesizing digital multipliers |
US6830391B2 (en) * | 2001-09-21 | 2004-12-14 | Panduit Corp. | Media cartridge with printed circuit board for use in a printing system |
KR101595280B1 (ko) * | 2014-06-25 | 2016-02-19 | 대우조선해양 주식회사 | 운전비용 절감형 제습장치 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6022502B2 (ja) * | 1976-08-27 | 1985-06-03 | 富士通株式会社 | 半導体装置の製造方法 |
US4228520A (en) * | 1979-05-04 | 1980-10-14 | International Business Machines Corporation | High speed multiplier using carry-save/propagate pipeline with sparse carries |
US4556948A (en) * | 1982-12-15 | 1985-12-03 | International Business Machines Corporation | Multiplier speed improvement by skipping carry save adders |
US4605470A (en) * | 1985-06-10 | 1986-08-12 | Advanced Micro Devices, Inc. | Method for interconnecting conducting layers of an integrated circuit device |
-
1988
- 1988-12-16 JP JP63318235A patent/JPH063839B2/ja not_active Expired - Fee Related
-
1989
- 1989-09-14 US US07/407,152 patent/US4979018A/en not_active Expired - Lifetime
- 1989-12-15 KR KR1019890018676A patent/KR930008981B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JPH063839B2 (ja) | 1994-01-12 |
KR930008981B1 (ko) | 1993-09-17 |
US4979018A (en) | 1990-12-18 |
JPH02163959A (ja) | 1990-06-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20030901 Year of fee payment: 11 |
|
LAPS | Lapse due to unpaid annual fee |