DE69231612D1 - Integrierte Schaltung mit programmierbarem Ausgang - Google Patents

Integrierte Schaltung mit programmierbarem Ausgang

Info

Publication number
DE69231612D1
DE69231612D1 DE69231612T DE69231612T DE69231612D1 DE 69231612 D1 DE69231612 D1 DE 69231612D1 DE 69231612 T DE69231612 T DE 69231612T DE 69231612 T DE69231612 T DE 69231612T DE 69231612 D1 DE69231612 D1 DE 69231612D1
Authority
DE
Germany
Prior art keywords
integrated circuit
programmable output
programmable
output
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69231612T
Other languages
English (en)
Other versions
DE69231612T2 (de
Inventor
Derek L Knee
Thomas O Wheless
Wang Kay Li
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of DE69231612D1 publication Critical patent/DE69231612D1/de
Application granted granted Critical
Publication of DE69231612T2 publication Critical patent/DE69231612T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
DE69231612T 1991-12-16 1992-11-02 Integrierte Schaltung mit programmierbarem Ausgang Expired - Fee Related DE69231612T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/807,971 US5337254A (en) 1991-12-16 1991-12-16 Programmable integrated circuit output pad

Publications (2)

Publication Number Publication Date
DE69231612D1 true DE69231612D1 (de) 2001-02-01
DE69231612T2 DE69231612T2 (de) 2001-05-03

Family

ID=25197556

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69231612T Expired - Fee Related DE69231612T2 (de) 1991-12-16 1992-11-02 Integrierte Schaltung mit programmierbarem Ausgang

Country Status (4)

Country Link
US (1) US5337254A (de)
EP (1) EP0547349B1 (de)
JP (1) JP3425172B2 (de)
DE (1) DE69231612T2 (de)

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DE4441523C1 (de) * 1994-11-22 1996-05-15 Itt Ind Gmbh Deutsche Digitale Treiberschaltung für eine integrierte Schaltung
US5739714A (en) * 1995-10-24 1998-04-14 Lucent Technologies, Inc. Apparatus for controlling ground bounce
US5844928A (en) * 1996-02-27 1998-12-01 Lucent Technologies, Inc. Laser driver with temperature sensor on an integrated circuit
WO1998036497A1 (en) * 1997-02-18 1998-08-20 Rambus, Inc. Bus driver circuit including a slew rate indicator circuit having a series of delay elements
US5959481A (en) 1997-02-18 1999-09-28 Rambus Inc. Bus driver circuit including a slew rate indicator circuit having a one shot circuit
US6085033A (en) * 1997-06-25 2000-07-04 Sun Microsystems, Inc. Method for determining bit element values for driver impedance control
US6363505B1 (en) * 1997-11-14 2002-03-26 Altera Corporation Programmable control circuit for grounding unused outputs
US6496037B1 (en) * 2000-06-06 2002-12-17 International Business Machines Corporation Automatic off-chip driver adjustment based on load characteristics
WO2001096893A1 (en) * 2000-06-16 2001-12-20 Transmeta Corporation Apparatus for controlling semiconductor chip characteristics
US6335638B1 (en) 2000-06-29 2002-01-01 Pericom Semiconductor Corp. Triple-slope clock driver for reduced EMI
US6864706B1 (en) * 2000-07-20 2005-03-08 Silicon Graphics, Inc. GTL+Driver
US20020135406A1 (en) * 2001-03-20 2002-09-26 Hossain Km Mozammel Controlled impedance driver receiving a combination binary and thermometer code
US7849332B1 (en) 2002-11-14 2010-12-07 Nvidia Corporation Processor voltage adjustment system and method
US7886164B1 (en) 2002-11-14 2011-02-08 Nvidia Corporation Processor temperature adjustment system and method
US7882369B1 (en) 2002-11-14 2011-02-01 Nvidia Corporation Processor performance adjustment system and method
US20050028020A1 (en) * 2003-07-28 2005-02-03 Ryan Zarrieff Spread spectrum clocking for data transfer bus loading
JP4610919B2 (ja) * 2004-03-29 2011-01-12 ルネサスエレクトロニクス株式会社 半導体集積回路装置
US7330080B1 (en) 2004-11-04 2008-02-12 Transmeta Corporation Ring based impedance control of an output driver
US7157932B2 (en) * 2004-11-30 2007-01-02 Agere Systems Inc. Adjusting settings of an I/O circuit for process, voltage, and/or temperature variations
US7348857B1 (en) 2005-02-28 2008-03-25 Marvell Semiconductor Israel Ltd. Monitoring and compensating for real time local circuit speed in an integrated circuit
US7739531B1 (en) * 2005-03-04 2010-06-15 Nvidia Corporation Dynamic voltage scaling
US7327167B2 (en) * 2005-04-28 2008-02-05 Silicon Graphics, Inc. Anticipatory programmable interface pre-driver
JP2007184809A (ja) * 2006-01-10 2007-07-19 Epson Toyocom Corp 発振装置
US9134782B2 (en) 2007-05-07 2015-09-15 Nvidia Corporation Maintaining optimum voltage supply to match performance of an integrated circuit
JP4939655B2 (ja) * 2007-10-31 2012-05-30 アギア システムズ インコーポレーテッド デジタル回路内の電力消費量を低減させる補償技法
US7812639B2 (en) * 2007-12-31 2010-10-12 Sandisk Corporation Extending drive capability in integrated circuits utilizing programmable-voltage output circuits
US8370663B2 (en) * 2008-02-11 2013-02-05 Nvidia Corporation Power management with dynamic frequency adjustments
US8154901B1 (en) 2008-04-14 2012-04-10 Netlist, Inc. Circuit providing load isolation and noise reduction
US8001434B1 (en) 2008-04-14 2011-08-16 Netlist, Inc. Memory board with self-testing capability
JP2010178262A (ja) * 2009-02-02 2010-08-12 Fujitsu Semiconductor Ltd ドライバストレングス調整回路、半導体集積回路、及びドライバストレングスの調整方法
US9256265B2 (en) 2009-12-30 2016-02-09 Nvidia Corporation Method and system for artificially and dynamically limiting the framerate of a graphics processing unit
US9830889B2 (en) 2009-12-31 2017-11-28 Nvidia Corporation Methods and system for artifically and dynamically limiting the display resolution of an application
US8839006B2 (en) 2010-05-28 2014-09-16 Nvidia Corporation Power consumption reduction systems and methods
US9251913B2 (en) 2011-06-09 2016-02-02 International Business Machines Corporation Infrastructure for performance based chip-to-chip stacking
US9928194B2 (en) 2015-11-30 2018-03-27 Allegro Microsystems, Llc Non-linear transmit biasing for a serial bus transmitter
US9621140B1 (en) 2016-01-15 2017-04-11 Allegro Microsystems, Llc Electronic circuit for driving an output current signal and method of driving the output current signal from the electronic circuit to achieve an altered transition of the output current signal
WO2019022825A2 (en) * 2017-07-28 2019-01-31 Qualcomm Incorporated GENERATION OF VOLTAGE HISTOGRAMS

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JPS5772429A (en) * 1980-10-22 1982-05-06 Toshiba Corp Semiconductor integrated circuit device
US4383216A (en) * 1981-01-29 1983-05-10 International Business Machines Corporation AC Measurement means for use with power control means for eliminating circuit to circuit delay differences
US4494021A (en) * 1982-08-30 1985-01-15 Xerox Corporation Self-calibrated clock and timing signal generator for MOS/VLSI circuitry
US4684897A (en) * 1984-01-03 1987-08-04 Raytheon Company Frequency correction apparatus
US4641048A (en) * 1984-08-24 1987-02-03 Tektronix, Inc. Digital integrated circuit propagation delay time controller
US4623805A (en) * 1984-08-29 1986-11-18 Burroughs Corporation Automatic signal delay adjustment apparatus
NL8403693A (nl) * 1984-12-05 1986-07-01 Philips Nv Adaptief electronisch buffersysteem.
US5086238A (en) * 1985-07-22 1992-02-04 Hitachi, Ltd. Semiconductor supply incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions
US4691124A (en) * 1986-05-16 1987-09-01 Motorola, Inc. Self-compensating, maximum speed integrated circuit
EP0253914A1 (de) * 1986-07-23 1988-01-27 Deutsche ITT Industries GmbH Isolierschicht-Feldeffekttransistor-Gegentakttreiberstufe mit Kompensierung von Betriebsparameterschwankungen und Fertigungsstreuungen
EP0264470B1 (de) * 1986-10-21 1991-03-06 International Business Machines Corporation Verfahren zur digitalen Regelung der Flankensteilheit der Ausgangssignale von Leistungsverstärkern der für einen Computer bestimmten Halbleiterchips mit hochintegrierten Schaltungen
US4818901A (en) * 1987-07-20 1989-04-04 Harris Corporation Controlled switching CMOS output buffer
US4939389A (en) * 1988-09-02 1990-07-03 International Business Machines Corporation VLSI performance compensation for off-chip drivers and clock generation
US5134311A (en) * 1990-06-07 1992-07-28 International Business Machines Corporation Self-adjusting impedance matching driver
DE4034043A1 (de) * 1990-10-26 1992-04-30 Standard Elektrik Lorenz Ag Schaltungsanordnung zur bereitstellung eines ausgangsstromes fuer einen datentreiber
US5198759A (en) * 1990-11-27 1993-03-30 Alcatel N.V. Test apparatus and method for testing digital system
US5243229A (en) * 1991-06-28 1993-09-07 At&T Bell Laboratories Digitally controlled element sizing
US5272390A (en) * 1991-09-23 1993-12-21 Digital Equipment Corporation Method and apparatus for clock skew reduction through absolute delay regulation
US5198758A (en) * 1991-09-23 1993-03-30 Digital Equipment Corp. Method and apparatus for complete functional testing of a complex signal path of a semiconductor chip

Also Published As

Publication number Publication date
US5337254A (en) 1994-08-09
JP3425172B2 (ja) 2003-07-07
EP0547349B1 (de) 2000-12-27
JPH0690160A (ja) 1994-03-29
DE69231612T2 (de) 2001-05-03
EP0547349A2 (de) 1993-06-23
EP0547349A3 (de) 1993-08-04

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: HEWLETT-PACKARD COMPANY (A DELAWARE CORPORATION),

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee