DE69112883T2 - Eingangstrennstufe mit rückgekoppelter Verriegelungsschaltung für ECL-Pegel. - Google Patents

Eingangstrennstufe mit rückgekoppelter Verriegelungsschaltung für ECL-Pegel.

Info

Publication number
DE69112883T2
DE69112883T2 DE69112883T DE69112883T DE69112883T2 DE 69112883 T2 DE69112883 T2 DE 69112883T2 DE 69112883 T DE69112883 T DE 69112883T DE 69112883 T DE69112883 T DE 69112883T DE 69112883 T2 DE69112883 T2 DE 69112883T2
Authority
DE
Germany
Prior art keywords
locking circuit
input isolator
feedback locking
ecl levels
ecl
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69112883T
Other languages
English (en)
Other versions
DE69112883D1 (de
Inventor
Dennis L Wendell
James E Demaris
Jeffrey B Chritz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Application granted granted Critical
Publication of DE69112883D1 publication Critical patent/DE69112883D1/de
Publication of DE69112883T2 publication Critical patent/DE69112883T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
DE69112883T 1990-04-02 1991-03-26 Eingangstrennstufe mit rückgekoppelter Verriegelungsschaltung für ECL-Pegel. Expired - Fee Related DE69112883T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/502,260 US5103121A (en) 1990-04-02 1990-04-02 Input buffer regenerative latch for ecl levels

Publications (2)

Publication Number Publication Date
DE69112883D1 DE69112883D1 (de) 1995-10-19
DE69112883T2 true DE69112883T2 (de) 1996-05-23

Family

ID=23997029

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69112883T Expired - Fee Related DE69112883T2 (de) 1990-04-02 1991-03-26 Eingangstrennstufe mit rückgekoppelter Verriegelungsschaltung für ECL-Pegel.

Country Status (5)

Country Link
US (1) US5103121A (de)
EP (1) EP0450454B1 (de)
JP (1) JPH04227318A (de)
KR (1) KR100220440B1 (de)
DE (1) DE69112883T2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0501085B1 (de) * 1991-02-28 1996-10-02 International Business Machines Corporation Pegelschieberschaltung für schnelle leistungsarme ECL nach CMOS-Eingangspuffern in biCMOS-Technik
JP3079675B2 (ja) * 1991-08-22 2000-08-21 ソニー株式会社 レベル変換回路
US5604417A (en) * 1991-12-19 1997-02-18 Hitachi, Ltd. Semiconductor integrated circuit device
US5343428A (en) * 1992-10-05 1994-08-30 Motorola Inc. Memory having a latching BICMOS sense amplifier
JP2546489B2 (ja) * 1993-04-23 1996-10-23 日本電気株式会社 レベル変換回路
JPH0750556A (ja) * 1993-08-09 1995-02-21 Fujitsu Ltd フリップフロップ型増幅回路
EP0658000A3 (de) * 1993-12-08 1996-04-03 At & T Corp Schnelle Komparatorschaltung.
US5426381A (en) * 1994-05-23 1995-06-20 Motorola Inc. Latching ECL to CMOS input buffer circuit
JP3575909B2 (ja) * 1996-03-29 2004-10-13 株式会社東芝 論理回路及びその設計方法
US5920729A (en) * 1996-04-30 1999-07-06 Vtc Inc. Apparatus for providing pair of complementary outputs with first and subcircuits to convert non-complementary and complementary inputs to first and second pair of complementary output
US20070252618A1 (en) * 2006-04-28 2007-11-01 Karthik Gopalakrishnan Signal converter circuit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2517142A1 (fr) * 1981-11-20 1983-05-27 Efcis Bascule bistable a stockage non volatil et a repositionnement statique
FR2587567B1 (fr) * 1985-09-17 1987-11-20 Thomson Csf Circuit de conversion d'une entree differentielle en niveaux logiques cmos
GB2209104A (en) * 1987-08-26 1989-04-26 Philips Nv An amplifier load circuit and an amplifier including the load circuit
US4806799A (en) * 1988-02-26 1989-02-21 Motorola, Inc. ECL to CMOS translator

Also Published As

Publication number Publication date
EP0450454A1 (de) 1991-10-09
US5103121A (en) 1992-04-07
DE69112883D1 (de) 1995-10-19
KR100220440B1 (ko) 1999-09-15
JPH04227318A (ja) 1992-08-17
KR910019341A (ko) 1991-11-30
EP0450454B1 (de) 1995-09-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee