DE69014035T2 - Pegelverschiebeschaltung zum Erzielen einer Hochgeschwindigkeits-Verarbeitung und einer verbesserten Ausgangsstrom-Speisefähigkeit. - Google Patents

Pegelverschiebeschaltung zum Erzielen einer Hochgeschwindigkeits-Verarbeitung und einer verbesserten Ausgangsstrom-Speisefähigkeit.

Info

Publication number
DE69014035T2
DE69014035T2 DE69014035T DE69014035T DE69014035T2 DE 69014035 T2 DE69014035 T2 DE 69014035T2 DE 69014035 T DE69014035 T DE 69014035T DE 69014035 T DE69014035 T DE 69014035T DE 69014035 T2 DE69014035 T2 DE 69014035T2
Authority
DE
Germany
Prior art keywords
high speed
output current
shift circuit
level shift
achieving high
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69014035T
Other languages
English (en)
Other versions
DE69014035D1 (de
Inventor
Masaji Ueno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69014035D1 publication Critical patent/DE69014035D1/de
Publication of DE69014035T2 publication Critical patent/DE69014035T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/017509—Interface arrangements
    • H03K19/017518—Interface arrangements using a combination of bipolar and field effect transistors [BIFET]
    • H03K19/017527—Interface arrangements using a combination of bipolar and field effect transistors [BIFET] with at least one differential stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE69014035T 1989-09-13 1990-09-13 Pegelverschiebeschaltung zum Erzielen einer Hochgeschwindigkeits-Verarbeitung und einer verbesserten Ausgangsstrom-Speisefähigkeit. Expired - Fee Related DE69014035T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1237456A JPH082019B2 (ja) 1989-09-13 1989-09-13 レベル変換回路

Publications (2)

Publication Number Publication Date
DE69014035D1 DE69014035D1 (de) 1994-12-15
DE69014035T2 true DE69014035T2 (de) 1995-04-27

Family

ID=17015613

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69014035T Expired - Fee Related DE69014035T2 (de) 1989-09-13 1990-09-13 Pegelverschiebeschaltung zum Erzielen einer Hochgeschwindigkeits-Verarbeitung und einer verbesserten Ausgangsstrom-Speisefähigkeit.

Country Status (5)

Country Link
US (1) US5075579A (de)
EP (1) EP0417786B1 (de)
JP (1) JPH082019B2 (de)
KR (1) KR930004351B1 (de)
DE (1) DE69014035T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4000665A1 (de) * 1990-01-11 1991-07-18 Siemens Ag Integrierbare transistorschaltstufe der logik-familie ntl
JP2855802B2 (ja) * 1990-06-27 1999-02-10 日本電気株式会社 レベル変換回路
US5254887A (en) * 1991-06-27 1993-10-19 Nec Corporation ECL to BiCMIS level converter
JP2839047B2 (ja) * 1991-10-25 1998-12-16 日本電気株式会社 半導体回路
JP2546489B2 (ja) * 1993-04-23 1996-10-23 日本電気株式会社 レベル変換回路
JP3019668B2 (ja) * 1993-05-21 2000-03-13 日本電気株式会社 半導体論理回路
DE4409453A1 (de) * 1994-03-18 1995-09-21 Thomson Brandt Gmbh BiCMOS-Pegelwandler ECL-CMOS
US5485106A (en) * 1994-04-05 1996-01-16 Sun Microsystems, Inc. ECL to CMOS converter
DE19601630C1 (de) * 1996-01-18 1997-06-26 Telefunken Microelectron Schaltungsanordnung zur Pegelumsetzung
JP3123463B2 (ja) * 1997-05-16 2001-01-09 日本電気株式会社 レベル変換回路
JP6398411B2 (ja) * 2014-07-17 2018-10-03 富士電機株式会社 半導体装置および電力変換装置
JP6498649B2 (ja) * 2016-10-17 2019-04-10 株式会社東海理化電機製作所 レベルシフタ

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4379267A (en) * 1980-06-25 1983-04-05 Mostek Corporation Low power differential amplifier
JPS5943631A (ja) * 1982-09-06 1984-03-10 Hitachi Ltd レベル変換入力回路
JPH0773205B2 (ja) * 1983-12-20 1995-08-02 株式会社日立製作所 レベル変換回路
JPS6119226A (ja) * 1984-07-05 1986-01-28 Hitachi Ltd レベル変換回路
DE3689462T2 (de) * 1985-10-23 1994-07-07 Nec Corp Logische Schaltung.
JPS6468019A (en) * 1987-09-08 1989-03-14 Hitachi Ltd Level converting circuit
JPS6474823A (en) * 1987-09-17 1989-03-20 Fujitsu Ltd Emitter follower circuit

Also Published As

Publication number Publication date
JPH0399516A (ja) 1991-04-24
KR930004351B1 (ko) 1993-05-26
US5075579A (en) 1991-12-24
DE69014035D1 (de) 1994-12-15
KR910007277A (ko) 1991-04-30
EP0417786A2 (de) 1991-03-20
JPH082019B2 (ja) 1996-01-10
EP0417786B1 (de) 1994-11-09
EP0417786A3 (en) 1991-05-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee