DE69034048D1 - Planare Isoliertechnik für integrierte Schaltungen - Google Patents

Planare Isoliertechnik für integrierte Schaltungen

Info

Publication number
DE69034048D1
DE69034048D1 DE69034048T DE69034048T DE69034048D1 DE 69034048 D1 DE69034048 D1 DE 69034048D1 DE 69034048 T DE69034048 T DE 69034048T DE 69034048 T DE69034048 T DE 69034048T DE 69034048 D1 DE69034048 D1 DE 69034048D1
Authority
DE
Germany
Prior art keywords
integrated circuits
insulation technology
planar insulation
planar
technology
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69034048T
Other languages
English (en)
Other versions
DE69034048T2 (de
Inventor
Steven J Hillenius
William Thomas Lynch
Lalita Manchanda
Mark Richard Pinto
Sheila Vaidya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=23530045&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE69034048(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by AT&T Corp filed Critical AT&T Corp
Application granted granted Critical
Publication of DE69034048D1 publication Critical patent/DE69034048D1/de
Publication of DE69034048T2 publication Critical patent/DE69034048T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/782—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, each consisting of a single circuit element
    • H01L21/784—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, each consisting of a single circuit element the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/763—Polycrystalline semiconductor regions
DE69034048T 1989-07-28 1990-07-18 Planare Isoliertechnik für integrierte Schaltungen Expired - Lifetime DE69034048T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US38747889A 1989-07-28 1989-07-28

Publications (2)

Publication Number Publication Date
DE69034048D1 true DE69034048D1 (de) 2003-04-17
DE69034048T2 DE69034048T2 (de) 2003-12-24

Family

ID=23530045

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69034048T Expired - Lifetime DE69034048T2 (de) 1989-07-28 1990-07-18 Planare Isoliertechnik für integrierte Schaltungen
DE69034230T Expired - Lifetime DE69034230T2 (de) 1989-07-28 1990-07-18 Planare Isoliertechnik für integrierte Schaltungen

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69034230T Expired - Lifetime DE69034230T2 (de) 1989-07-28 1990-07-18 Planare Isoliertechnik für integrierte Schaltungen

Country Status (6)

Country Link
US (1) US5373180A (de)
EP (2) EP0410633B1 (de)
JP (1) JPH0366145A (de)
KR (1) KR940004995B1 (de)
CA (1) CA2016449C (de)
DE (2) DE69034048T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996002070A2 (en) * 1994-07-12 1996-01-25 National Semiconductor Corporation Integrated circuit comprising a trench isolation structure and an oxygen barrier layer and method for forming the integrated circuit
JP3904676B2 (ja) * 1997-04-11 2007-04-11 株式会社ルネサステクノロジ トレンチ型素子分離構造の製造方法およびトレンチ型素子分離構造
US6472335B1 (en) * 1998-10-19 2002-10-29 Taiwan Semiconductor Manufacturing Company Methods of adhesion promoter between low-K layer and underlying insulating layer
JP2004172310A (ja) * 2002-11-19 2004-06-17 Renesas Technology Corp 半導体装置の製造方法
KR100618698B1 (ko) * 2004-06-21 2006-09-08 주식회사 하이닉스반도체 반도체 소자 및 그의 제조방법

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS598353A (ja) * 1982-07-07 1984-01-17 Nec Corp 半導体集積回路装置
JPS59217339A (ja) * 1983-05-26 1984-12-07 Toshiba Corp 半導体装置の製造方法
JPS6132544A (ja) * 1984-07-25 1986-02-15 Matsushita Electric Ind Co Ltd 半導体集積回路装置の製造方法
US4571819A (en) * 1984-11-01 1986-02-25 Ncr Corporation Method for forming trench isolation structures
JPS61271854A (ja) * 1985-05-27 1986-12-02 Nec Corp 半導体素子分離構造及びその製造方法
US4825278A (en) * 1985-10-17 1989-04-25 American Telephone And Telegraph Company At&T Bell Laboratories Radiation hardened semiconductor devices
US4704368A (en) * 1985-10-30 1987-11-03 International Business Machines Corporation Method of making trench-incorporated monolithic semiconductor capacitor and high density dynamic memory cells including the capacitor
JPH0616556B2 (ja) * 1987-04-14 1994-03-02 株式会社東芝 半導体装置
JPH01125935A (ja) * 1987-11-11 1989-05-18 Seiko Instr & Electron Ltd 半導体装置の製造方法
JPH01138730A (ja) * 1987-11-25 1989-05-31 Fujitsu Ltd 半導体装置
JPH0797627B2 (ja) * 1987-12-21 1995-10-18 株式会社日立製作所 半導体装置

Also Published As

Publication number Publication date
DE69034230D1 (de) 2006-10-26
US5373180A (en) 1994-12-13
EP0410633A3 (en) 1991-02-27
DE69034230T2 (de) 2007-09-13
EP0410633B1 (de) 2003-03-12
KR910003782A (ko) 1991-02-28
DE69034048T2 (de) 2003-12-24
EP1143505A3 (de) 2001-11-07
JPH0366145A (ja) 1991-03-20
EP1143505A2 (de) 2001-10-10
CA2016449A1 (en) 1991-01-28
EP1143505B1 (de) 2006-09-13
KR940004995B1 (ko) 1994-06-09
CA2016449C (en) 1996-06-25
EP0410633A2 (de) 1991-01-30

Similar Documents

Publication Publication Date Title
DE69127060D1 (de) Tester für integrierte Schaltungen
DE69030738D1 (de) Induktive Strukturen für halbleitende integrierte Schaltungen
DE3751920T2 (de) Isolationsverfahren für integrierte Schaltungen
DE69226098T2 (de) Lokale Kontaktverbindungen für integrierte Schaltungen
DE69316038D1 (de) Kühlungsstruktur für integrierte Schaltungen
DE68924452T2 (de) Packungsstruktur für integrierte Schaltungen.
DE69115776D1 (de) Prüfvorrichtung für integrierte schaltungen
DE69226987D1 (de) Lokalverbindungen für integrierte Schaltungen
DE3582752D1 (de) Testeinrichtung fuer integrierte schaltungen.
DE69014998D1 (de) Lokalverbindungen für integrierte Schaltungen.
DE69028646D1 (de) Störungsvermindernde Schaltungen
DE3889069T2 (de) Verzögerungsschaltungen für integrierte Schaltungen.
DE69016962D1 (de) Dynamische Isolierschaltung für integrierte Schaltungen.
DE69017140D1 (de) Isolation für integrierte Schaltungsanordnung.
DE3579066D1 (de) System fuer die pruefung funktioneller elektronischer schaltungen.
DE69611632D1 (de) Planare Isolation für integrierte Schaltungen
DE3667547D1 (de) Kontaktloses pruefen integrierter schaltungen.
DE69034230D1 (de) Planare Isoliertechnik für integrierte Schaltungen
DE3855949D1 (de) Gehäuse für integrierte Schaltungen
DE69430036T2 (de) Testvorrichtung für integrierte Schaltungen
DE58908568D1 (de) Eingangsschutzstruktur für integrierte Schaltungen.
DE3687785D1 (de) Integrierte schaltungen.
DE58907584D1 (de) Eingangsschutzstruktur für integrierte Schaltungen.
ATA200888A (de) Konditionierungsmittel für gedruckte schaltungen
DE3853327D1 (de) Testmethode für elektronische Schaltungen.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition