DE69030223D1 - Gestapeltes Mehrschichtsubstrat zum Montieren integrierter Schaltungen - Google Patents

Gestapeltes Mehrschichtsubstrat zum Montieren integrierter Schaltungen

Info

Publication number
DE69030223D1
DE69030223D1 DE69030223T DE69030223T DE69030223D1 DE 69030223 D1 DE69030223 D1 DE 69030223D1 DE 69030223 T DE69030223 T DE 69030223T DE 69030223 T DE69030223 T DE 69030223T DE 69030223 D1 DE69030223 D1 DE 69030223D1
Authority
DE
Germany
Prior art keywords
integrated circuits
layer substrate
stacked multi
mounting integrated
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69030223T
Other languages
English (en)
Other versions
DE69030223T2 (de
Inventor
Keith O Warren
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Northrop Grumman Guidance and Electronics Co Inc
Original Assignee
Litton Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Litton Systems Inc filed Critical Litton Systems Inc
Application granted granted Critical
Publication of DE69030223D1 publication Critical patent/DE69030223D1/de
Publication of DE69030223T2 publication Critical patent/DE69030223T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/562—Protection against mechanical damage
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385—Assembly of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
DE69030223T 1989-09-14 1990-09-07 Gestapeltes Mehrschichtsubstrat zum Montieren integrierter Schaltungen Expired - Fee Related DE69030223T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/407,045 US5006923A (en) 1989-09-14 1989-09-14 Stackable multilayer substrate for mounting integrated circuits

Publications (2)

Publication Number Publication Date
DE69030223D1 true DE69030223D1 (de) 1997-04-24
DE69030223T2 DE69030223T2 (de) 1997-07-03

Family

ID=23610383

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69030223T Expired - Fee Related DE69030223T2 (de) 1989-09-14 1990-09-07 Gestapeltes Mehrschichtsubstrat zum Montieren integrierter Schaltungen

Country Status (5)

Country Link
US (1) US5006923A (de)
EP (1) EP0417992B1 (de)
JP (1) JP2796886B2 (de)
CA (1) CA2024784C (de)
DE (1) DE69030223T2 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5227338A (en) * 1990-04-30 1993-07-13 International Business Machines Corporation Three-dimensional memory card structure with internal direct chip attachment
US5241456A (en) * 1990-07-02 1993-08-31 General Electric Company Compact high density interconnect structure
WO1992022090A1 (en) * 1991-06-03 1992-12-10 Motorola, Inc. Thermally conductive electronic assembly
US5285108A (en) * 1991-06-21 1994-02-08 Compaq Computer Corporation Cooling system for integrated circuits
US5241454A (en) * 1992-01-22 1993-08-31 International Business Machines Corporation Mutlilayered flexible circuit package
US5657206A (en) * 1994-06-23 1997-08-12 Cubic Memory, Inc. Conductive epoxy flip-chip package and method
US6124633A (en) * 1994-06-23 2000-09-26 Cubic Memory Vertical interconnect process for silicon segments with thermally conductive epoxy preform
US6080596A (en) * 1994-06-23 2000-06-27 Cubic Memory Inc. Method for forming vertical interconnect process for silicon segments with dielectric isolation
US5891761A (en) * 1994-06-23 1999-04-06 Cubic Memory, Inc. Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform
US6486528B1 (en) 1994-06-23 2002-11-26 Vertical Circuits, Inc. Silicon segment programming apparatus and three terminal fuse configuration
US5675180A (en) * 1994-06-23 1997-10-07 Cubic Memory, Inc. Vertical interconnect process for silicon segments
US6255726B1 (en) 1994-06-23 2001-07-03 Cubic Memory, Inc. Vertical interconnect process for silicon segments with dielectric isolation
US5698895A (en) * 1994-06-23 1997-12-16 Cubic Memory, Inc. Silicon segment programming method and apparatus
DE19627543B9 (de) * 1996-05-18 2004-10-14 Thomas Hofmann Multi-Layer-Substrat sowie Verfahren zu seiner Herstellung
US5801108A (en) * 1996-09-11 1998-09-01 Motorola Inc. Low temperature cofireable dielectric paste
US6016005A (en) * 1998-02-09 2000-01-18 Cellarosi; Mario J. Multilayer, high density micro circuit module and method of manufacturing same
US20030041966A1 (en) * 2001-08-31 2003-03-06 International Business Machines Corporation Method of joining laminates for z-axis interconnection
US7705432B2 (en) * 2004-04-13 2010-04-27 Vertical Circuits, Inc. Three dimensional six surface conformal die coating
US7215018B2 (en) 2004-04-13 2007-05-08 Vertical Circuits, Inc. Stacked die BGA or LGA component assembly
US9109831B2 (en) 2007-07-11 2015-08-18 AIR LIQUIDE GLOBAL E&C SOLUTIONS US Inc. Process and apparatus for the separation of a gaseous mixture

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3704455A (en) * 1971-02-01 1972-11-28 Alfred D Scarbrough 3d-coaxial memory construction and method of making
CA977451A (en) * 1972-04-27 1975-11-04 Bunker Ramo Corporation Electrical circuit packaging structure and method of fabrication thereof
JPS5275969A (en) * 1975-12-22 1977-06-25 Hitachi Ltd Mounting method of matrix circuit
JPS5990183A (ja) * 1982-11-15 1984-05-24 Sony Corp カ−ド
JPS60164959A (ja) * 1984-02-08 1985-08-28 Teac Co 磁気デイスク装置
US4680617A (en) * 1984-05-23 1987-07-14 Ross Milton I Encapsulated electronic circuit device, and method and apparatus for making same
JPS60252992A (ja) * 1984-05-30 1985-12-13 Toshiba Corp Ｉｃカ−ド
JPS614267A (ja) * 1984-06-18 1986-01-10 Nec Corp 三次元実装回路モジユ−ル
JPS6134990A (ja) * 1984-07-25 1986-02-19 イビデン株式会社 電子部品搭載用基板およびその製造方法
US4709468A (en) * 1986-01-31 1987-12-01 Texas Instruments Incorporated Method for producing an integrated circuit product having a polyimide film interconnection structure
JPS635999A (ja) * 1986-06-27 1988-01-11 株式会社東芝 カ−ド型電子回路ユニツト
JPS6457653A (en) * 1987-08-27 1989-03-03 Fujitsu Ltd Mounting structure of hybrid integrated circuit component

Also Published As

Publication number Publication date
CA2024784A1 (en) 1991-03-15
US5006923A (en) 1991-04-09
JPH03183195A (ja) 1991-08-09
EP0417992A2 (de) 1991-03-20
CA2024784C (en) 1994-01-04
EP0417992B1 (de) 1997-03-19
JP2796886B2 (ja) 1998-09-10
DE69030223T2 (de) 1997-07-03
EP0417992A3 (en) 1991-08-07

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: LITTON SYSTEMS, INC., WOODLAND HILLS, CALIF., US

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee