DE69024921D1 - Halbleiterspeicheranordnung mit rückstellbaren Speicherzellen - Google Patents

Halbleiterspeicheranordnung mit rückstellbaren Speicherzellen

Info

Publication number
DE69024921D1
DE69024921D1 DE69024921T DE69024921T DE69024921D1 DE 69024921 D1 DE69024921 D1 DE 69024921D1 DE 69024921 T DE69024921 T DE 69024921T DE 69024921 T DE69024921 T DE 69024921T DE 69024921 D1 DE69024921 D1 DE 69024921D1
Authority
DE
Germany
Prior art keywords
resettable
arrangement
memory cells
semiconductor memory
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69024921T
Other languages
English (en)
Other versions
DE69024921T2 (de
Inventor
Yasuo Shibue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69024921D1 publication Critical patent/DE69024921D1/de
Application granted granted Critical
Publication of DE69024921T2 publication Critical patent/DE69024921T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory
DE69024921T 1989-11-24 1990-11-23 Halbleiterspeicheranordnung mit rückstellbaren Speicherzellen Expired - Fee Related DE69024921T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30549089 1989-11-24

Publications (2)

Publication Number Publication Date
DE69024921D1 true DE69024921D1 (de) 1996-02-29
DE69024921T2 DE69024921T2 (de) 1996-09-05

Family

ID=17945788

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69024921T Expired - Fee Related DE69024921T2 (de) 1989-11-24 1990-11-23 Halbleiterspeicheranordnung mit rückstellbaren Speicherzellen

Country Status (3)

Country Link
US (1) US5285420A (de)
EP (1) EP0430101B1 (de)
DE (1) DE69024921T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2667941B2 (ja) * 1992-09-17 1997-10-27 三菱電機株式会社 メモリセル回路
US6128215A (en) 1997-08-19 2000-10-03 Altera Corporation Static random access memory circuits
US6772277B2 (en) * 2001-04-30 2004-08-03 Hewlett-Packard Development Company, L.P. Method of writing to a memory array using clear enable and column clear signals
EP1324340A1 (de) * 2001-12-28 2003-07-02 STMicroelectronics S.r.l. Statischer RAM mit Flashlösungsfunktion
US7200020B2 (en) * 2005-08-30 2007-04-03 Freescale Semiconductor, Inc. Storage element with clear operation and method thereof
US7458040B1 (en) * 2005-09-01 2008-11-25 Synopsys, Inc. Resettable memory apparatuses and design
US9286971B1 (en) 2014-09-10 2016-03-15 Apple Inc. Method and circuits for low latency initialization of static random access memory

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4488264A (en) * 1982-06-10 1984-12-11 Dshkhunian Valery Transistor storage
US4575823A (en) * 1982-08-17 1986-03-11 Westinghouse Electric Corp. Electrically alterable non-volatile memory
US4567578A (en) * 1982-09-08 1986-01-28 Harris Corporation Cache memory flush scheme
JPS6085496A (ja) * 1983-10-17 1985-05-14 Toshiba Corp 半導体メモリ
JPS62266798A (ja) * 1986-05-13 1987-11-19 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JPH0810553B2 (ja) * 1986-06-13 1996-01-31 松下電器産業株式会社 記憶回路
US4805149A (en) * 1986-08-28 1989-02-14 Advanced Micro Devices, Inc. Digital memory with reset/preset capabilities
JPS6432494A (en) * 1987-07-27 1989-02-02 Mitsubishi Electric Corp Non-volatile semiconductor storage device
JPH01130385A (ja) * 1987-11-17 1989-05-23 Sony Corp メモリ装置
US5054000A (en) * 1988-02-19 1991-10-01 Sony Corporation Static random access memory device having a high speed read-out and flash-clear functions
US4890263A (en) * 1988-05-31 1989-12-26 Dallas Semiconductor Corporation RAM with capability for rapid clearing of data from memory by simultaneously selecting all row lines
JP2600304B2 (ja) * 1988-06-30 1997-04-16 三菱電機株式会社 半導体記憶装置とこれを用いたデータパス

Also Published As

Publication number Publication date
EP0430101A3 (en) 1992-06-17
US5285420A (en) 1994-02-08
EP0430101B1 (de) 1996-01-17
EP0430101A2 (de) 1991-06-05
DE69024921T2 (de) 1996-09-05

Similar Documents

Publication Publication Date Title
DE69121760D1 (de) Halbleiterspeicherzelle
KR890012387A (ko) 반도체 기억장치
DE69031276D1 (de) Halbleiterspeicheranordnung
DE68911044D1 (de) Halbleiterspeicher.
KR870005391A (ko) 자기정정기능을 갖춘 반도체메모리
KR900012278A (ko) 반도체 기억장치
DE69215707D1 (de) Halbleiter-Speicherzelle
DE3585733D1 (de) Halbleiterspeichereinrichtung mit lese-aenderung-schreib-konfiguration.
DE3689004D1 (de) Halbleiterspeicherzelle.
DE69124291D1 (de) Halbleiterspeicher mit verbesserter Leseanordnung
KR900015160A (ko) 반도체 기억장치
KR890016569A (ko) 반도체 기억장치
KR900011010A (ko) 반도체 기억장치
DE3588186D1 (de) Halbleiterspeicher mit Serienzugriff
DE68921900D1 (de) Halbleiterspeicheranordnung mit serieller Zugriffsanordnung.
DE68918193D1 (de) Halbleiterspeicher.
DE68924213D1 (de) Standard-Zellen mit Flip-Flops.
KR900008521A (ko) 반도체 기억장치
KR900006986A (ko) 반도체메모리
DE69024945D1 (de) Halbleiterspeicheranordnung
DE69220465D1 (de) Halbleiteranordnung mit Speicherzelle
DE68923899D1 (de) Halbleiterspeicher.
DE69025516D1 (de) Halbleiter-Speichergerät mit redundanten Speicherzellen
DE69223495D1 (de) Halbleiteranordnung mit mindestens einer Speicherzelle
DE3781631D1 (de) Halbleiterspeichervorrichtung mit verbesserter zellenanordnung.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee