DE68925793D1 - Integrierte Halbleiteranordnung mit Paaren von Teilen unbestimmter Spannung - Google Patents
Integrierte Halbleiteranordnung mit Paaren von Teilen unbestimmter SpannungInfo
- Publication number
- DE68925793D1 DE68925793D1 DE68925793T DE68925793T DE68925793D1 DE 68925793 D1 DE68925793 D1 DE 68925793D1 DE 68925793 T DE68925793 T DE 68925793T DE 68925793 T DE68925793 T DE 68925793T DE 68925793 D1 DE68925793 D1 DE 68925793D1
- Authority
- DE
- Germany
- Prior art keywords
- pairs
- parts
- semiconductor device
- integrated semiconductor
- undetermined voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dram (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63312799A JP2650377B2 (ja) | 1988-12-13 | 1988-12-13 | 半導体集積回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE68925793D1 true DE68925793D1 (de) | 1996-04-04 |
| DE68925793T2 DE68925793T2 (de) | 1996-07-11 |
Family
ID=18033542
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE68925793T Expired - Fee Related DE68925793T2 (de) | 1988-12-13 | 1989-12-12 | Integrierte Halbleiteranordnung mit Paaren von Teilen unbestimmter Spannung |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US5140555A (de) |
| EP (1) | EP0373885B1 (de) |
| JP (1) | JP2650377B2 (de) |
| KR (1) | KR930011447B1 (de) |
| DE (1) | DE68925793T2 (de) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07111083A (ja) * | 1993-08-20 | 1995-04-25 | Mitsubishi Electric Corp | 半導体記憶装置 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2553591C2 (de) * | 1975-11-28 | 1977-11-17 | Siemens AG, 1000 Berlin und 8000 München | Speichermatrix mit einem oder mehreren Ein-Transistor-Speicherelementen |
| JPS5817998B2 (ja) * | 1978-10-26 | 1983-04-11 | 富士通株式会社 | 半導体メモリ |
| JPS58111183A (ja) * | 1981-12-25 | 1983-07-02 | Hitachi Ltd | ダイナミツクｒａｍ集積回路装置 |
| JPH0666442B2 (ja) * | 1985-03-08 | 1994-08-24 | 三菱電機株式会社 | 半導体メモリ装置 |
| JPS62256297A (ja) * | 1986-04-30 | 1987-11-07 | Hitachi Ltd | 半導体メモリ |
| CA1305255C (en) * | 1986-08-25 | 1992-07-14 | Joseph Lebowitz | Marching interconnecting lines in semiconductor integrated circuits |
| KR890003372B1 (ko) * | 1986-11-24 | 1989-09-19 | 삼성전자 주식회사 | 다이나믹 랜덤 액세스 메모리 어레이 |
| JPS63153792A (ja) * | 1986-12-17 | 1988-06-27 | Sharp Corp | 半導体メモリ装置 |
| JPH0632214B2 (ja) * | 1987-04-06 | 1994-04-27 | 日本電気株式会社 | 半導体記憶装置 |
| JPH07105134B2 (ja) * | 1987-08-28 | 1995-11-13 | 三菱電機株式会社 | 半導体記憶装置 |
-
1988
- 1988-12-13 JP JP63312799A patent/JP2650377B2/ja not_active Expired - Lifetime
-
1989
- 1989-12-12 US US07/449,204 patent/US5140555A/en not_active Expired - Fee Related
- 1989-12-12 EP EP89312971A patent/EP0373885B1/de not_active Expired - Lifetime
- 1989-12-12 DE DE68925793T patent/DE68925793T2/de not_active Expired - Fee Related
- 1989-12-13 KR KR1019890018452A patent/KR930011447B1/ko not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| EP0373885A3 (de) | 1991-03-13 |
| JPH02158994A (ja) | 1990-06-19 |
| JP2650377B2 (ja) | 1997-09-03 |
| DE68925793T2 (de) | 1996-07-11 |
| KR900010779A (ko) | 1990-07-09 |
| EP0373885A2 (de) | 1990-06-20 |
| EP0373885B1 (de) | 1996-02-28 |
| KR930011447B1 (ko) | 1993-12-08 |
| US5140555A (en) | 1992-08-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition | ||
| 8339 | Ceased/non-payment of the annual fee |