DE68918955T2 - Trimmverfahren mit Hilfe eines Laserstrahls. - Google Patents

Trimmverfahren mit Hilfe eines Laserstrahls.

Info

Publication number
DE68918955T2
DE68918955T2 DE68918955T DE68918955T DE68918955T2 DE 68918955 T2 DE68918955 T2 DE 68918955T2 DE 68918955 T DE68918955 T DE 68918955T DE 68918955 T DE68918955 T DE 68918955T DE 68918955 T2 DE68918955 T2 DE 68918955T2
Authority
DE
Germany
Prior art keywords
laser beam
trimming process
trimming
laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68918955T
Other languages
English (en)
Other versions
DE68918955D1 (de
Inventor
Kaoru Imamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE68918955D1 publication Critical patent/DE68918955D1/de
Application granted granted Critical
Publication of DE68918955T2 publication Critical patent/DE68918955T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20—Resistors
    • H01L28/24—Resistors with an active material comprising a refractory, transition or noble metal, metal compound or metal alloy, e.g. silicides, oxides, nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/22—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming
    • H01C17/24—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming by removing or adding resistive material
    • H01C17/242—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming by removing or adding resistive material by laser
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Optics & Photonics (AREA)
  • High Energy & Nuclear Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Plasma & Fusion (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
DE68918955T 1988-01-13 1989-01-09 Trimmverfahren mit Hilfe eines Laserstrahls. Expired - Fee Related DE68918955T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63005566A JPH01184861A (ja) 1988-01-13 1988-01-13 レーザ光によるトリミング方法

Publications (2)

Publication Number Publication Date
DE68918955D1 DE68918955D1 (de) 1994-12-01
DE68918955T2 true DE68918955T2 (de) 1995-02-23

Family

ID=11614760

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68918955T Expired - Fee Related DE68918955T2 (de) 1988-01-13 1989-01-09 Trimmverfahren mit Hilfe eines Laserstrahls.

Country Status (5)

Country Link
US (1) US4928838A (de)
EP (1) EP0324407B1 (de)
JP (1) JPH01184861A (de)
KR (1) KR920004516B1 (de)
DE (1) DE68918955T2 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0294555A (ja) * 1988-09-30 1990-04-05 Toshiba Corp トリミング抵抗体
JP2584884B2 (ja) * 1990-05-31 1997-02-26 株式会社日立製作所 配線基板
US5068513A (en) * 1990-09-28 1991-11-26 Beloit Corporation Water jet slitter with laser finish and method
US5213649A (en) * 1990-10-15 1993-05-25 Beloit Technologies, Inc. Apparatus for receiving and cutting a continuous web
US5235154A (en) * 1992-04-28 1993-08-10 International Business Machines Corporation Laser removal of metal interconnects
US5345361A (en) * 1992-08-24 1994-09-06 Murata Erie North America, Inc. Shorted trimmable composite multilayer capacitor and method
US5347423A (en) * 1992-08-24 1994-09-13 Murata Erie North America, Inc. Trimmable composite multilayer capacitor and method
TW429382B (en) 1998-11-06 2001-04-11 Matsushita Electric Ind Co Ltd Regulating resistor, semiconductor equipment and its production method
DE10141352A1 (de) * 2001-08-23 2003-06-05 Osram Opto Semiconductors Gmbh Verfahren zur Oberflächenbehandlung eines Halbleiters
KR100431179B1 (ko) * 2001-12-04 2004-05-12 삼성전기주식회사 온도보상 수정발진기 및 그 출력주파수조정방법
US20030129396A1 (en) * 2001-12-27 2003-07-10 Gerhard Kiessling Coating composition for metal conductors and coating process involving the use thereof
JP5087205B2 (ja) * 2002-03-28 2012-12-05 ジーエスアイ ルモニックス コーポレイション デバイスのアレイを高速かつ正確にマイクロマシニング加工する方法及びシステム
JP2004140117A (ja) 2002-10-16 2004-05-13 Hitachi Ltd 多層回路基板、及び多層回路基板の製造方法
WO2004102664A1 (ja) * 2003-05-13 2004-11-25 Fujitsu Limited ヒューズ回路および半導体集積回路装置
US8426745B2 (en) * 2009-11-30 2013-04-23 Intersil Americas Inc. Thin film resistor
WO2012099635A2 (en) * 2010-10-28 2012-07-26 President And Fellows Of Harvard College Electron beam processing with condensed ice
JP5666411B2 (ja) * 2011-09-30 2015-02-12 セイコーインスツル株式会社 半導体装置
CN112687558A (zh) * 2020-12-05 2021-04-20 西安翔腾微电子科技有限公司 一种改善激光修调多晶硅电阻精度的方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4146673A (en) * 1977-10-27 1979-03-27 E. I. Du Pont De Nemours And Company Process of film resistor laser trimming and composition of removable coating used therein
US4179310A (en) * 1978-07-03 1979-12-18 National Semiconductor Corporation Laser trim protection process
US4272775A (en) * 1978-07-03 1981-06-09 National Semiconductor Corporation Laser trim protection process and structure
US4374314A (en) * 1981-08-17 1983-02-15 Analog Devices, Inc. Laser template trimming of circuit elements
EP0164564A1 (de) * 1984-05-18 1985-12-18 Siemens Aktiengesellschaft Anordnung zur Sacklocherzeugung in einem laminierten Aufbau
JPH0789567B2 (ja) * 1985-02-25 1995-09-27 株式会社日立製作所 半導体装置
JPH0640563B2 (ja) * 1985-03-13 1994-05-25 株式会社東芝 膜抵抗体のレ−ザトリミング方法
JPS6288338A (ja) * 1985-10-15 1987-04-22 Nec Corp 半導体記憶装置

Also Published As

Publication number Publication date
DE68918955D1 (de) 1994-12-01
KR920004516B1 (ko) 1992-06-08
JPH01184861A (ja) 1989-07-24
KR890012365A (ko) 1989-08-26
EP0324407A3 (en) 1990-10-17
EP0324407B1 (de) 1994-10-26
EP0324407A2 (de) 1989-07-19
US4928838A (en) 1990-05-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee