DE602004018531D1 - Kerbenfreies ätzen von soi-strukturen mit hohem seultiplexten prozesses und hf-vormodulation - Google Patents

Kerbenfreies ätzen von soi-strukturen mit hohem seultiplexten prozesses und hf-vormodulation

Info

Publication number
DE602004018531D1
DE602004018531D1 DE602004018531T DE602004018531T DE602004018531D1 DE 602004018531 D1 DE602004018531 D1 DE 602004018531D1 DE 602004018531 T DE602004018531 T DE 602004018531T DE 602004018531 T DE602004018531 T DE 602004018531T DE 602004018531 D1 DE602004018531 D1 DE 602004018531D1
Authority
DE
Germany
Prior art keywords
seultiplexed
premodulation
tool
processes
soi structures
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004018531T
Other languages
English (en)
Inventor
Sunil Srinivasan
David Johnson
Russell Westerman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oerlikon USA Inc
Original Assignee
Unaxis USA Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unaxis USA Inc filed Critical Unaxis USA Inc
Publication of DE602004018531D1 publication Critical patent/DE602004018531D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H01L21/30655—Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76283—Lateral isolation by refilling of trenches with dielectric material

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Peptides Or Proteins (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
DE602004018531T 2003-10-21 2004-10-19 Kerbenfreies ätzen von soi-strukturen mit hohem seultiplexten prozesses und hf-vormodulation Active DE602004018531D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US51293303P 2003-10-21 2003-10-21
US10/968,823 US20050112891A1 (en) 2003-10-21 2004-10-18 Notch-free etching of high aspect SOI structures using a time division multiplex process and RF bias modulation
PCT/US2004/034803 WO2005045904A2 (en) 2003-10-21 2004-10-19 Notch-free etching of high aspect soi structures using a time division multiplex process and rf bias modulation

Publications (1)

Publication Number Publication Date
DE602004018531D1 true DE602004018531D1 (de) 2009-01-29

Family

ID=34576731

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004018531T Active DE602004018531D1 (de) 2003-10-21 2004-10-19 Kerbenfreies ätzen von soi-strukturen mit hohem seultiplexten prozesses und hf-vormodulation

Country Status (6)

Country Link
US (2) US20050112891A1 (de)
EP (1) EP1676302B1 (de)
JP (1) JP2007509506A (de)
AT (1) ATE418157T1 (de)
DE (1) DE602004018531D1 (de)
WO (1) WO2005045904A2 (de)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006012297A1 (en) * 2004-06-29 2006-02-02 Unaxis Usa Inc. Method and apparatus for reducing aspect ratio dependent etching in time division multiplexed etch processes
US7749400B2 (en) * 2005-12-16 2010-07-06 Jason Plumhoff Method for etching photolithographic substrates
US7351664B2 (en) * 2006-05-30 2008-04-01 Lam Research Corporation Methods for minimizing mask undercuts and notches for plasma processing system
JP5082338B2 (ja) * 2006-08-25 2012-11-28 東京エレクトロン株式会社 エッチング方法及びエッチング装置
US7682986B2 (en) * 2007-02-05 2010-03-23 Lam Research Corporation Ultra-high aspect ratio dielectric etch
US7547636B2 (en) * 2007-02-05 2009-06-16 Lam Research Corporation Pulsed ultra-high aspect ratio dielectric etch
US7737042B2 (en) * 2007-02-22 2010-06-15 Applied Materials, Inc. Pulsed-plasma system for etching semiconductor structures
US7718538B2 (en) * 2007-02-21 2010-05-18 Applied Materials, Inc. Pulsed-plasma system with pulsed sample bias for etching semiconductor substrates
US7771606B2 (en) * 2007-02-22 2010-08-10 Applied Materials, Inc. Pulsed-plasma system with pulsed reaction gas replenish for etching semiconductors structures
JP5608157B2 (ja) * 2008-03-21 2014-10-15 アプライド マテリアルズ インコーポレイテッド 基板エッチングシステム及びプロセスの方法及び装置
JP2010118549A (ja) * 2008-11-13 2010-05-27 Tokyo Electron Ltd プラズマエッチング方法及びプラズマエッチング装置
JP2011100760A (ja) * 2009-11-04 2011-05-19 Ulvac Japan Ltd エッチング方法
US8658541B2 (en) * 2010-01-15 2014-02-25 Applied Materials, Inc. Method of controlling trench microloading using plasma pulsing
US9373521B2 (en) 2010-02-24 2016-06-21 Tokyo Electron Limited Etching processing method
US8802545B2 (en) * 2011-03-14 2014-08-12 Plasma-Therm Llc Method and apparatus for plasma dicing a semi-conductor wafer
US9105705B2 (en) * 2011-03-14 2015-08-11 Plasma-Therm Llc Method and apparatus for plasma dicing a semi-conductor wafer
JP5718124B2 (ja) * 2011-03-30 2015-05-13 株式会社日立ハイテクノロジーズ プラズマ処理装置及びプラズマ処理方法
US8758638B2 (en) * 2011-05-10 2014-06-24 Applied Materials, Inc. Copper oxide removal techniques
US8609548B2 (en) * 2011-06-06 2013-12-17 Lam Research Corporation Method for providing high etch rate
US20130119018A1 (en) * 2011-11-15 2013-05-16 Keren Jacobs Kanarik Hybrid pulsing plasma processing systems
US8883028B2 (en) * 2011-12-28 2014-11-11 Lam Research Corporation Mixed mode pulsing etching in plasma processing systems
GB2499816A (en) * 2012-02-29 2013-09-04 Oxford Instr Nanotechnology Tools Ltd Controlling deposition and etching in a chamber with fine time control of parameters and gas flow
JP5841917B2 (ja) 2012-08-24 2016-01-13 株式会社日立ハイテクノロジーズ プラズマ処理装置及びプラズマ処理方法
JP5967710B2 (ja) * 2012-09-28 2016-08-10 サムコ株式会社 プラズマエッチングの終点検出方法
CN103928283B (zh) * 2013-01-10 2016-06-15 中微半导体设备(上海)有限公司 一种真空处理腔室的射频脉冲功率匹配的方法及其装置
US9653316B2 (en) * 2013-02-18 2017-05-16 Tokyo Electron Limited Plasma processing method and plasma processing apparatus
JP6173086B2 (ja) * 2013-07-19 2017-08-02 キヤノン株式会社 シリコン基板のエッチング方法
US20150371889A1 (en) * 2014-06-20 2015-12-24 Applied Materials, Inc. Methods for shallow trench isolation formation in a silicon germanium layer
US9691625B2 (en) * 2015-11-04 2017-06-27 Lam Research Corporation Methods and systems for plasma etching using bi-modal process gas composition responsive to plasma power level
US10090162B2 (en) 2016-01-18 2018-10-02 Hitachi High-Technologies Corporation Plasma processing method and plasma processing device
US11295937B2 (en) * 2019-09-17 2022-04-05 Tokyo Electron Limited Broadband plasma processing systems and methods
US11170981B2 (en) * 2019-09-17 2021-11-09 Tokyo Electron Limited Broadband plasma processing systems and methods
RU2715412C1 (ru) * 2019-11-26 2020-02-28 Акционерное общество «Российская корпорация ракетно-космического приборостроения и информационных систем» (АО «Российские космические системы») Многослойная коммутационная плата СВЧ-гибридной интегральной микросхемы космического назначения и способ её получения (варианты)
US20230187174A1 (en) * 2020-09-02 2023-06-15 Hitachi High-Tech Corporation Plasma processing apparatus and plasma processing method
US11917806B2 (en) 2021-08-12 2024-02-27 Changxin Memory Technologies, Inc. Method of manufacturing semiconductor structure and semiconductor structure

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6050923A (ja) * 1983-08-31 1985-03-22 Hitachi Ltd プラズマ表面処理方法
KR890004881B1 (ko) * 1983-10-19 1989-11-30 가부시기가이샤 히다찌세이사꾸쇼 플라즈마 처리 방법 및 그 장치
KR900007687B1 (ko) * 1986-10-17 1990-10-18 가부시기가이샤 히다찌세이사꾸쇼 플라즈마처리방법 및 장치
DE3733135C1 (de) * 1987-10-01 1988-09-22 Leybold Ag Vorrichtung zum Beschichten oder AEtzen mittels eines Plasmas
JP2918892B2 (ja) * 1988-10-14 1999-07-12 株式会社日立製作所 プラズマエッチング処理方法
DE4241045C1 (de) * 1992-12-05 1994-05-26 Bosch Gmbh Robert Verfahren zum anisotropen Ätzen von Silicium
KR100324792B1 (ko) * 1993-03-31 2002-06-20 히가시 데쓰로 플라즈마처리장치
JP3119172B2 (ja) * 1995-09-13 2000-12-18 日新電機株式会社 プラズマｃｖｄ法及び装置
US5983828A (en) * 1995-10-13 1999-11-16 Mattson Technology, Inc. Apparatus and method for pulsed plasma processing of a semiconductor substrate
US6253704B1 (en) * 1995-10-13 2001-07-03 Mattson Technology, Inc. Apparatus and method for pulsed plasma processing of a semiconductor substrate
JP3220383B2 (ja) * 1996-07-23 2001-10-22 東京エレクトロン株式会社 プラズマ処理装置及びその方法
ATE251341T1 (de) * 1996-08-01 2003-10-15 Surface Technology Systems Plc Verfahren zur ätzung von substraten
US6214162B1 (en) * 1996-09-27 2001-04-10 Tokyo Electron Limited Plasma processing apparatus
JP3220394B2 (ja) * 1996-09-27 2001-10-22 東京エレクトロン株式会社 プラズマ処理装置
JPH10150025A (ja) * 1996-11-20 1998-06-02 Mitsubishi Electric Corp プラズマ反応装置
US6187685B1 (en) * 1997-08-01 2001-02-13 Surface Technology Systems Limited Method and apparatus for etching a substrate
US6071822A (en) * 1998-06-08 2000-06-06 Plasma-Therm, Inc. Etching process for producing substantially undercut free silicon on insulator structures
US6126778A (en) * 1998-07-22 2000-10-03 Micron Technology, Inc. Beat frequency modulation for plasma generation
JP2000077388A (ja) * 1998-08-28 2000-03-14 Hitachi Ltd ドライエッチング方法及びドライエッチング装置
JP4163857B2 (ja) * 1998-11-04 2008-10-08 サーフィス テクノロジー システムズ ピーエルシー 基板をエッチングするための方法と装置
DE19919832A1 (de) * 1999-04-30 2000-11-09 Bosch Gmbh Robert Verfahren zum anisotropen Plasmaätzen von Halbleitern
US6562190B1 (en) * 2000-10-06 2003-05-13 Lam Research Corporation System, apparatus, and method for processing wafer using single frequency RF power in plasma processing chamber

Also Published As

Publication number Publication date
US20070175856A1 (en) 2007-08-02
ATE418157T1 (de) 2009-01-15
US20050112891A1 (en) 2005-05-26
WO2005045904A3 (en) 2005-09-09
EP1676302B1 (de) 2008-12-17
WO2005045904A2 (en) 2005-05-19
EP1676302A2 (de) 2006-07-05
JP2007509506A (ja) 2007-04-12

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