DE60104395D1 - Verfahren zum Recycling eines Dummy-Wafers aus Silizium - Google Patents

Verfahren zum Recycling eines Dummy-Wafers aus Silizium

Info

Publication number
DE60104395D1
DE60104395D1 DE60104395T DE60104395T DE60104395D1 DE 60104395 D1 DE60104395 D1 DE 60104395D1 DE 60104395 T DE60104395 T DE 60104395T DE 60104395 T DE60104395 T DE 60104395T DE 60104395 D1 DE60104395 D1 DE 60104395D1
Authority
DE
Germany
Prior art keywords
recycling
dummy wafer
silicon dummy
silicon
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60104395T
Other languages
English (en)
Other versions
DE60104395T2 (de
Inventor
Terry Breeden
Mike Tucker
Stefan Ottow
Wolfram Koestler
Dan Wissel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies SC300 GmbH and Co KG
Qimonda AG
NXP USA Inc
Original Assignee
Infineon Technologies AG
Infineon Technologies SC300 GmbH and Co KG
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG, Infineon Technologies SC300 GmbH and Co KG, Motorola Inc filed Critical Infineon Technologies AG
Publication of DE60104395D1 publication Critical patent/DE60104395D1/de
Application granted granted Critical
Publication of DE60104395T2 publication Critical patent/DE60104395T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/318—Inorganic layers composed of nitrides
    • H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Weting (AREA)
  • Formation Of Insulating Films (AREA)
DE60104395T 2001-04-19 2001-04-19 Verfahren zum Recycling eines Dummy-Wafers aus Silizium Expired - Lifetime DE60104395T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP01109698A EP1251553B1 (de) 2001-04-19 2001-04-19 Verfahren zum Recycling eines Dummy-Wafers aus Silizium

Publications (2)

Publication Number Publication Date
DE60104395D1 true DE60104395D1 (de) 2004-08-26
DE60104395T2 DE60104395T2 (de) 2005-07-21

Family

ID=8177183

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60104395T Expired - Lifetime DE60104395T2 (de) 2001-04-19 2001-04-19 Verfahren zum Recycling eines Dummy-Wafers aus Silizium

Country Status (3)

Country Link
US (1) US6663674B2 (de)
EP (1) EP1251553B1 (de)
DE (1) DE60104395T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100498495B1 (ko) * 2003-05-07 2005-07-01 삼성전자주식회사 반도체 소자의 세정 시스템 및 이를 이용한 세정방법
DE10338504A1 (de) * 2003-08-21 2004-10-07 Infineon Technologies Ag Dummy-Wafer für Ofenprozesse, insbesondere Schichtabscheidungs-Ofenprozesse, und entsprechendes Herstellungsverfahren
KR100598260B1 (ko) * 2003-12-31 2006-07-07 동부일렉트로닉스 주식회사 질화막 제조 방법
FR2880471B1 (fr) * 2004-12-31 2007-03-09 Altis Semiconductor Snc Procede de nettoyage d'un semiconducteur
TWI327761B (en) * 2005-10-07 2010-07-21 Rohm & Haas Elect Mat Method for making semiconductor wafer and wafer holding article
US8409997B2 (en) * 2007-01-25 2013-04-02 Taiwan Semiconductor Maufacturing Co., Ltd. Apparatus and method for controlling silicon nitride etching tank
US8460478B2 (en) 2007-05-29 2013-06-11 Taiwan Semiconductor Manufacturing Co., Ltd. Wet processing apparatuses
US20080315310A1 (en) * 2007-06-19 2008-12-25 Willy Rachmady High k dielectric materials integrated into multi-gate transistor structures
US7910014B2 (en) * 2007-09-28 2011-03-22 Taiwan Semiconductor Manufacturing Co., Ltd. Method and system for improving wet chemical bath process stability and productivity in semiconductor manufacturing
CN102443395B (zh) * 2010-09-30 2016-01-20 韩国泰科诺赛美材料株式会社 用于湿法蚀刻二氧化硅的组合物
CN105047528B (zh) * 2015-05-04 2018-08-21 华北电力大学 一种用于制备大面积柔性超薄单晶硅片的湿法化学腐蚀法
CN114883210A (zh) * 2022-04-28 2022-08-09 广州粤芯半导体技术有限公司 控片及其制造方法与应用

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3063116B2 (ja) * 1990-06-29 2000-07-12 松下電器産業株式会社 化学的気相成長方法
US5658833A (en) * 1996-01-30 1997-08-19 United Microelectronics Corporation Method and dummy disc for uniformly depositing silicon nitride
JPH10189782A (ja) * 1996-12-20 1998-07-21 Ricoh Co Ltd 不揮発性半導体メモリ装置とその製造方法
TW350090B (en) 1997-12-31 1999-01-11 Macronix Int Co Ltd Method for recycling wafers a method for recycling wafers

Also Published As

Publication number Publication date
US6663674B2 (en) 2003-12-16
EP1251553B1 (de) 2004-07-21
DE60104395T2 (de) 2005-07-21
EP1251553A1 (de) 2002-10-23
US20020173154A1 (en) 2002-11-21

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: INFINEON TECHNOLOGIES AG, 81669 MUENCHEN, DE

Owner name: FREESCALE SEMICONDUCTOR, INC., AUSTIN, TEX., US

Owner name: INFINEON TECHNOLOGIES SC300 GMBH & CO. OHG, 01099

8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FREESCALE SEMICONDUCTOR, INC., AUSTIN, TEX., US

Owner name: INFINEON TECHNOLOGIES SC300 GMBH & CO. OHG, 01, DE

Owner name: QIMONDA AG, 81739 MUENCHEN, DE