DE60040798D1 - Halbleiteranordnung mit Driftbereichen mit entgegengesetzten Leitungstypen - Google Patents

Halbleiteranordnung mit Driftbereichen mit entgegengesetzten Leitungstypen

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Publication number
DE60040798D1
DE60040798D1 DE60040798T DE60040798T DE60040798D1 DE 60040798 D1 DE60040798 D1 DE 60040798D1 DE 60040798 T DE60040798 T DE 60040798T DE 60040798 T DE60040798 T DE 60040798T DE 60040798 D1 DE60040798 D1 DE 60040798D1
Authority
DE
Germany
Prior art keywords
semiconductor device
opposite conductivity
conductivity types
drift regions
drift
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60040798T
Other languages
English (en)
Inventor
Yoshitaka Sugawara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kansai Electric Power Co Inc
Original Assignee
Kansai Electric Power Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP30601299A external-priority patent/JP3987251B2/ja
Application filed by Kansai Electric Power Co Inc filed Critical Kansai Electric Power Co Inc
Application granted granted Critical
Publication of DE60040798D1 publication Critical patent/DE60040798D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7825Lateral DMOS transistors, i.e. LDMOS transistors with trench gate electrode
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    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
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    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
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    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/772Field effect transistors
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    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7809Vertical DMOS transistors, i.e. VDMOS transistors having both source and drain contacts on the same surface, i.e. Up-Drain VDMOS transistors

Landscapes

  • Microelectronics & Electronic Packaging (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Bipolar Transistors (AREA)
  • Junction Field-Effect Transistors (AREA)
DE60040798T 1999-10-27 2000-10-24 Halbleiteranordnung mit Driftbereichen mit entgegengesetzten Leitungstypen Expired - Lifetime DE60040798D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP30601299A JP3987251B2 (ja) 1999-05-21 1999-10-27 半導体装置
PCT/JP2000/007444 WO2001031710A1 (fr) 1999-10-27 2000-10-24 Dispositif semi-conducteur

Publications (1)

Publication Number Publication Date
DE60040798D1 true DE60040798D1 (de) 2008-12-24

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
DE60040798T Expired - Lifetime DE60040798D1 (de) 1999-10-27 2000-10-24 Halbleiteranordnung mit Driftbereichen mit entgegengesetzten Leitungstypen

Country Status (4)

Country Link
US (1) US7470960B1 (de)
EP (2) EP1858085A3 (de)
DE (1) DE60040798D1 (de)
WO (1) WO2001031710A1 (de)

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Publication number Priority date Publication date Assignee Title
JP5017865B2 (ja) * 2006-01-17 2012-09-05 富士電機株式会社 半導体装置
US7804150B2 (en) * 2006-06-29 2010-09-28 Fairchild Semiconductor Corporation Lateral trench gate FET with direct source-drain current path
US7605446B2 (en) * 2006-07-14 2009-10-20 Cambridge Semiconductor Limited Bipolar high voltage/power semiconductor device having first and second insulated gated and method of operation
JP5298488B2 (ja) * 2007-09-28 2013-09-25 富士電機株式会社 半導体装置
JP2009206268A (ja) * 2008-02-27 2009-09-10 Seiko Instruments Inc 半導体装置及びその製造方法
DE102009033302B4 (de) * 2009-07-15 2012-01-26 Infineon Technologies Ag Herstellungsverfahren für ein unipolares Halbleiter-Bauelement und Halbleitervorrichtung
WO2011083552A1 (ja) * 2010-01-08 2011-07-14 三菱電機株式会社 エピタキシャルウエハ及び半導体素子
CA2777675A1 (en) 2010-01-19 2011-07-28 Sumitomo Electric Industries, Ltd. Silicon carbide semiconductor device and method of manufacturing thereof
JP2011253883A (ja) * 2010-06-01 2011-12-15 On Semiconductor Trading Ltd 半導体装置及びその製造方法
JP6290457B2 (ja) * 2015-01-19 2018-03-07 株式会社日立製作所 半導体装置及びその製造方法、電力変換装置、3相モータシステム、自動車、並びに鉄道車両
JP6822088B2 (ja) * 2016-11-15 2021-01-27 富士電機株式会社 炭化珪素半導体装置および炭化珪素半導体装置の製造方法
EP3627559B1 (de) * 2018-09-19 2022-06-22 Imec Vzw Iii-v-halbleiterbauelement und verfahren zur herstellung eines iii-v-halbleiterbauelements mit einer randabschlussstruktur
JP7075876B2 (ja) 2018-12-25 2022-05-26 株式会社日立製作所 炭化ケイ素半導体装置、電力変換装置、3相モータシステム、自動車および鉄道車両

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GB2089119A (en) * 1980-12-10 1982-06-16 Philips Electronic Associated High voltage semiconductor devices
JP2622588B2 (ja) 1988-07-04 1997-06-18 富士通株式会社 半導体装置の製造方法
EP0537684B1 (de) 1991-10-15 1998-05-20 Texas Instruments Incorporated Lateraler doppel-diffundierter MOS-Transistor und Verfahren zu seiner Herstellung
DE4309764C2 (de) * 1993-03-25 1997-01-30 Siemens Ag Leistungs-MOSFET
JPH0897411A (ja) * 1994-09-21 1996-04-12 Fuji Electric Co Ltd 横型高耐圧トレンチmosfetおよびその製造方法
JP3395473B2 (ja) 1994-10-25 2003-04-14 富士電機株式会社 横型トレンチmisfetおよびその製造方法
GB2309336B (en) * 1996-01-22 2001-05-23 Fuji Electric Co Ltd Semiconductor device
JP3641547B2 (ja) 1998-03-25 2005-04-20 株式会社豊田中央研究所 横型mos素子を含む半導体装置
DE19818300C1 (de) * 1998-04-23 1999-07-22 Siemens Ag Lateraler Hochvolt-Seitenwandtransistor
JP3376294B2 (ja) 1998-10-06 2003-02-10 株式会社東芝 半導体装置

Also Published As

Publication number Publication date
EP1858085A3 (de) 2008-01-23
EP1229591B1 (de) 2008-11-12
WO2001031710A1 (fr) 2001-05-03
US7470960B1 (en) 2008-12-30
EP1858085A2 (de) 2007-11-21
EP1229591A4 (de) 2007-01-03
EP1229591A1 (de) 2002-08-07

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