DE60034483T2 - L- und U-Gate-Bauelemente für SOI/SOS-Anwendungen - Google Patents

L- und U-Gate-Bauelemente für SOI/SOS-Anwendungen Download PDF

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Publication number
DE60034483T2
DE60034483T2 DE60034483T DE60034483T DE60034483T2 DE 60034483 T2 DE60034483 T2 DE 60034483T2 DE 60034483 T DE60034483 T DE 60034483T DE 60034483 T DE60034483 T DE 60034483T DE 60034483 T2 DE60034483 T2 DE 60034483T2
Authority
DE
Germany
Prior art keywords
leg
area
shaped gate
gate
edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60034483T
Other languages
German (de)
English (en)
Other versions
DE60034483D1 (de
Inventor
David Owen Minnetonka ERSTAD
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honeywell Inc
Original Assignee
Honeywell Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inc filed Critical Honeywell Inc
Application granted granted Critical
Publication of DE60034483D1 publication Critical patent/DE60034483D1/de
Publication of DE60034483T2 publication Critical patent/DE60034483T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6708—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
    • H10D30/6711—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect by using electrodes contacting the supplementary regions or layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI

Landscapes

  • Thin Film Transistor (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Steering-Linkage Mechanisms And Four-Wheel Steering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE60034483T 1999-12-28 2000-12-18 L- und U-Gate-Bauelemente für SOI/SOS-Anwendungen Expired - Lifetime DE60034483T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/473,158 US6307237B1 (en) 1999-12-28 1999-12-28 L-and U-gate devices for SOI/SOS applications
US473158 1999-12-28
PCT/US2000/034249 WO2001048828A1 (en) 1999-12-28 2000-12-18 L- and u-gate devices for soi/sos applications

Publications (2)

Publication Number Publication Date
DE60034483D1 DE60034483D1 (de) 2007-05-31
DE60034483T2 true DE60034483T2 (de) 2008-01-03

Family

ID=23878441

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60034483T Expired - Lifetime DE60034483T2 (de) 1999-12-28 2000-12-18 L- und U-Gate-Bauelemente für SOI/SOS-Anwendungen

Country Status (6)

Country Link
US (1) US6307237B1 (enExample)
EP (2) EP1243028B1 (enExample)
JP (1) JP2003518775A (enExample)
AT (1) ATE360261T1 (enExample)
DE (1) DE60034483T2 (enExample)
WO (1) WO2001048828A1 (enExample)

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JP3716406B2 (ja) * 2000-02-08 2005-11-16 富士通株式会社 絶縁ゲート型半導体装置及びその製造方法
US6483156B1 (en) * 2000-03-16 2002-11-19 International Business Machines Corporation Double planar gated SOI MOSFET structure
US20030036236A1 (en) * 2001-08-15 2003-02-20 Joseph Benedetto Method for radiation hardening N-channel MOS transistors
US6642579B2 (en) * 2001-08-28 2003-11-04 International Business Machines Corporation Method of reducing the extrinsic body resistance in a silicon-on-insulator body contacted MOSFET
JP4044446B2 (ja) * 2002-02-19 2008-02-06 セイコーインスツル株式会社 半導体装置およびその製造方法
US20030222308A1 (en) * 2002-05-30 2003-12-04 Taiwan Semiconductor Manufacturing Co., Ltd. SOI MOSFET with compact body-tied-source structure
US6960810B2 (en) * 2002-05-30 2005-11-01 Honeywell International Inc. Self-aligned body tie for a partially depleted SOI device structure
US6861716B1 (en) * 2003-10-31 2005-03-01 International Business Machines Corporation Ladder-type gate structure for four-terminal SOI semiconductor device
US7084462B1 (en) * 2005-04-15 2006-08-01 International Business Machines Corporation Parallel field effect transistor structure having a body contact
US20070090431A1 (en) * 2005-10-24 2007-04-26 Honeywell International Inc. Device layout for reducing device upset due to single event effects
KR100654053B1 (ko) * 2005-12-29 2006-12-05 동부일렉트로닉스 주식회사 부가 게이트 도체 패턴을 갖는 협채널 금속 산화물 반도체트랜지스터
KR101219464B1 (ko) * 2007-07-23 2013-01-11 삼성전자주식회사 반도체 장치 및 그 제조 방법
US8410554B2 (en) * 2008-03-26 2013-04-02 International Business Machines Corporation Method, structure and design structure for customizing history effects of SOI circuits
US8420460B2 (en) 2008-03-26 2013-04-16 International Business Machines Corporation Method, structure and design structure for customizing history effects of SOI circuits
US7964467B2 (en) * 2008-03-26 2011-06-21 International Business Machines Corporation Method, structure and design structure for customizing history effects of soi circuits
GB2459666A (en) * 2008-04-29 2009-11-04 Sharp Kk Thin film transistor with low leakage current
GB2460395A (en) * 2008-04-29 2009-12-02 Sharp Kk Thin film transistor and active matrix display
JP5555864B2 (ja) * 2009-12-22 2014-07-23 株式会社ブルックマンテクノロジ 絶縁ゲート型半導体素子及び絶縁ゲート型半導体集積回路
CN101931008B (zh) * 2010-07-13 2015-04-08 中国科学院上海微系统与信息技术研究所 一种具有体接触结构的pd soi器件
US8217456B1 (en) 2011-03-11 2012-07-10 International Business Machines Corporation Low capacitance hi-K dual work function metal gate body-contacted field effect transistor
JP6184057B2 (ja) * 2012-04-18 2017-08-23 ルネサスエレクトロニクス株式会社 半導体装置
US20140103440A1 (en) * 2012-10-15 2014-04-17 Texas Instruments Incorporated I-shaped gate electrode for improved sub-threshold mosfet performance
US20170141134A1 (en) * 2015-11-18 2017-05-18 Peregrine Semiconductor Corporation Butted Body Contact for SOI Transistor
US9842858B2 (en) 2015-11-18 2017-12-12 Peregrine Semiconductor Corporation Butted body contact for SOI transistor
DE112016006634T5 (de) * 2016-03-23 2018-12-06 Psemi Corporation Anliegender bodykontakt für soi-transistor
US9837965B1 (en) 2016-09-16 2017-12-05 Peregrine Semiconductor Corporation Standby voltage condition for fast RF amplifier bias recovery
FR3056331B1 (fr) * 2016-09-19 2018-10-26 Stmicroelectronics Sa Polarisation de la region de substrat d'un transistor mos
US10424664B2 (en) 2016-12-14 2019-09-24 Globalfoundries Inc. Poly gate extension source to body contact
US9960737B1 (en) 2017-03-06 2018-05-01 Psemi Corporation Stacked PA power control
FR3076398B1 (fr) * 2017-12-29 2019-12-27 X-Fab France Transistor et son procede de fabrication
US11444169B2 (en) 2020-02-27 2022-09-13 Taiwan Semiconductor Manufacturing Company, Ltd. Transistor device with a gate structure having recesses overlying an interface between isolation and device regions
CN113314610B (zh) 2020-02-27 2024-04-30 台湾积体电路制造股份有限公司 晶体管器件及其制造方法
US11476279B2 (en) 2020-08-06 2022-10-18 Globalfoundries U.S. Inc. Devices with staggered body contacts
CN114188408A (zh) * 2020-09-14 2022-03-15 联华电子股份有限公司 半导体元件

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6021542A (ja) * 1983-07-15 1985-02-02 Toshiba Corp 半導体集積回路装置
JPH0379035A (ja) * 1989-08-22 1991-04-04 Nippondenso Co Ltd Ｍｏｓトランジスタ及びその製造方法
US5217915A (en) * 1991-04-08 1993-06-08 Texas Instruments Incorporated Method of making gate array base cell
USH1435H (en) 1991-10-21 1995-05-02 Cherne Richard D SOI CMOS device having body extension for providing sidewall channel stop and bodytie
US5298773A (en) 1992-08-17 1994-03-29 United Technologies Corporation Silicon-on-insulator H-transistor layout for gate arrays
US5317181A (en) 1992-09-10 1994-05-31 United Technologies Corporation Alternative body contact for fully-depleted silicon-on-insulator transistors
US5334545A (en) 1993-02-01 1994-08-02 Allied Signal Inc. Process for forming self-aligning cobalt silicide T-gates of silicon MOS devices
JP3364559B2 (ja) * 1995-10-11 2003-01-08 三菱電機株式会社 半導体装置
US5821575A (en) 1996-05-20 1998-10-13 Digital Equipment Corporation Compact self-aligned body contact silicon-on-insulator transistor
US5920093A (en) 1997-04-07 1999-07-06 Motorola, Inc. SOI FET having gate sub-regions conforming to t-shape
KR100252913B1 (ko) * 1997-04-21 2000-04-15 김영환 반도체 소자 및 그 제조방법
US5811855A (en) 1997-12-29 1998-09-22 United Technologies Corporation SOI combination body tie

Also Published As

Publication number Publication date
EP1243028B1 (en) 2007-04-18
ATE360261T1 (de) 2007-05-15
EP1243028A1 (en) 2002-09-25
US6307237B1 (en) 2001-10-23
JP2003518775A (ja) 2003-06-10
WO2001048828A1 (en) 2001-07-05
DE60034483D1 (de) 2007-05-31
EP1783836A3 (en) 2008-02-27
EP1783836A2 (en) 2007-05-09

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