DE60008203D1 - Phasenregelschleife mit digital gesteuertem frequenzvervielfachendem Oszillator - Google Patents

Phasenregelschleife mit digital gesteuertem frequenzvervielfachendem Oszillator

Info

Publication number
DE60008203D1
DE60008203D1 DE60008203T DE60008203T DE60008203D1 DE 60008203 D1 DE60008203 D1 DE 60008203D1 DE 60008203 T DE60008203 T DE 60008203T DE 60008203 T DE60008203 T DE 60008203T DE 60008203 D1 DE60008203 D1 DE 60008203D1
Authority
DE
Germany
Prior art keywords
locked loop
phase locked
digitally controlled
controlled frequency
frequency multiplying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60008203T
Other languages
English (en)
Other versions
DE60008203T2 (de
Inventor
William Burdett Wilson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia of America Corp
Original Assignee
Lucent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lucent Technologies Inc filed Critical Lucent Technologies Inc
Application granted granted Critical
Publication of DE60008203D1 publication Critical patent/DE60008203D1/de
Publication of DE60008203T2 publication Critical patent/DE60008203T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0992Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
DE60008203T 1999-10-26 2000-10-16 Phasenregelschleife mit digital gesteuertem frequenzvervielfachendem Oszillator Expired - Lifetime DE60008203T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US427312 1999-10-26
US09/427,312 US6594330B1 (en) 1999-10-26 1999-10-26 Phase-locked loop with digitally controlled, frequency-multiplying oscillator

Publications (2)

Publication Number Publication Date
DE60008203D1 true DE60008203D1 (de) 2004-03-18
DE60008203T2 DE60008203T2 (de) 2004-12-16

Family

ID=23694325

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60008203T Expired - Lifetime DE60008203T2 (de) 1999-10-26 2000-10-16 Phasenregelschleife mit digital gesteuertem frequenzvervielfachendem Oszillator

Country Status (4)

Country Link
US (1) US6594330B1 (de)
EP (1) EP1104111B1 (de)
JP (1) JP3796109B2 (de)
DE (1) DE60008203T2 (de)

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GB2339352B (en) * 1998-06-30 2002-02-06 Lsi Logic Corp Testing analog to digital converters
KR100346839B1 (ko) * 2000-10-10 2002-08-03 삼성전자 주식회사 시그마-델타 변조기를 이용한 분수-n 주파수 합성 장치및 그 방법
JP2003067991A (ja) 2001-06-07 2003-03-07 Fuji Photo Film Co Ltd 光ディスクの製造方法及びディスク積層体の搬送方法
US7292832B2 (en) * 2001-09-17 2007-11-06 Analog Device, Inc. Timing and frequency control method and circuit for digital wireless telephone system terminals
US7356111B1 (en) * 2003-01-14 2008-04-08 Advanced Micro Devices, Inc. Apparatus and method for fractional frequency division using multi-phase output VCO
KR100510523B1 (ko) * 2003-03-13 2005-08-26 삼성전자주식회사 데드존을 제거하는 지연 구간에서 발생한 클럭 트랜지션을차지 펌프 제어에 반영하는 위상/주파수 검출기 및 그위상/주파수 검출 방법
EP1811670B1 (de) 2003-04-02 2010-03-10 Christopher Julian Travis Numerisch gesteuerter Oszillator und Verfahren zum Erzeugen eines Ereignis-Taktes
US7274406B2 (en) * 2003-07-10 2007-09-25 Texas Instruments Incorporated Equilibrium based vertical sync phase lock loop for video decoder
US7362380B2 (en) * 2003-07-10 2008-04-22 Texas Instruments Incorporated Equilibrium based vertical sync phase lock loop for video decoder
AU2003262592A1 (en) * 2003-09-05 2005-03-29 Flextronics Design Finland Oy A method for steering an oscillator and an oscillator
GB0323936D0 (en) 2003-10-11 2003-11-12 Zarlink Semiconductor Inc Digital phase locked loop with selectable normal or fast-locking capability
KR100574980B1 (ko) * 2004-04-26 2006-05-02 삼성전자주식회사 빠른 주파수 락을 위한 위상 동기 루프
US7042258B2 (en) * 2004-04-29 2006-05-09 Agere Systems Inc. Signal generator with selectable mode control
US7222035B1 (en) * 2004-11-17 2007-05-22 Topcon Gps, Llc Method and apparatus for determining changing signal frequency
US7551016B2 (en) * 2005-02-04 2009-06-23 Atmel Corporation Programmable clock generator apparatus, systems, and methods
DE102005023909B3 (de) 2005-05-24 2006-10-12 Infineon Technologies Ag Digitaler Phasenregelkreis und Verfahren zur Korrektur von Störanteilen in einem Phasenregelkreis
US7539277B2 (en) * 2005-09-09 2009-05-26 Freescale Semiconductor, Inc. Binary stream switching controlled modulus divider for fractional frequency synthesis
JP4855129B2 (ja) * 2006-04-26 2012-01-18 ルネサスエレクトロニクス株式会社 デジタル放送受信装置およびデジタル放送システム
US7859343B2 (en) 2006-11-13 2010-12-28 Industrial Technology Research Institute High-resolution varactors, single-edge triggered digitally controlled oscillators, and all-digital phase-locked loops using the same
GB0622945D0 (en) 2006-11-17 2006-12-27 Zarlink Semiconductor Inc Fractional digital PLL
TWI329423B (en) * 2007-01-19 2010-08-21 Faraday Tech Corp Wide-locking range phase locked loop using adaptive post division technique
US7538706B2 (en) * 2007-09-25 2009-05-26 Mediatek Inc. Mash modulator and frequency synthesizer using the same
CN101572543A (zh) * 2008-05-04 2009-11-04 华为技术有限公司 一种稳定时钟的方法和装置
US8138840B2 (en) * 2009-01-23 2012-03-20 International Business Machines Corporation Optimal dithering of a digitally controlled oscillator with clock dithering for gain and bandwidth control
US8515374B2 (en) 2009-07-02 2013-08-20 Semiconductor Components Industries, Llc PLL circuit, and radio communication apparatus equipped with same
US8471614B2 (en) * 2011-06-14 2013-06-25 Globalfoundries Singapore Pte. Ltd. Digital phase locked loop system and method
JP6292975B2 (ja) * 2014-05-21 2018-03-14 三菱電機株式会社 Pll回路
US9350365B2 (en) * 2014-09-18 2016-05-24 Intel Corporation Digital phase-locked loop supply voltage control
CN111642138B (zh) * 2019-01-02 2023-12-26 京东方科技集团股份有限公司 锁频环、电子设备和频率生成方法
CN110518906B (zh) * 2019-08-30 2023-04-07 京东方科技集团股份有限公司 信号生成电路及其方法、数字时间转换电路及其方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4563657A (en) 1982-03-15 1986-01-07 Codex Corporation Frequency synthesizer and digital phase lock loop
US5018170A (en) 1989-11-21 1991-05-21 Unisys Corporation Variable data rate clock synthesizer
FR2658015B1 (fr) 1990-02-06 1994-07-29 Bull Sa Circuit verrouille en phase et multiplieur de frequence en resultant.
US5187722A (en) 1990-08-13 1993-02-16 At&T Bell Laboratories Frequency synthesis using fractional frequency multiplication
AU6339594A (en) 1993-06-09 1994-12-15 Alcatel N.V. Synchronized clock
US5675620A (en) * 1994-10-26 1997-10-07 At&T Global Information Solutions Company High-frequency phase locked loop circuit
KR19980042114A (ko) * 1996-11-11 1998-08-17 가나이 츠토무 위상록루프회로를 갖는 시스템
US6356129B1 (en) * 1999-10-12 2002-03-12 Teradyne, Inc. Low jitter phase-locked loop with duty-cycle control

Also Published As

Publication number Publication date
JP3796109B2 (ja) 2006-07-12
EP1104111A1 (de) 2001-05-30
DE60008203T2 (de) 2004-12-16
EP1104111B1 (de) 2004-02-11
JP2001177407A (ja) 2001-06-29
US6594330B1 (en) 2003-07-15

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