FI954624A0 - Digitaalinen vaihelukittu sisäsilmukka - Google Patents
Digitaalinen vaihelukittu sisäsilmukkaInfo
- Publication number
- FI954624A0 FI954624A0 FI954624A FI954624A FI954624A0 FI 954624 A0 FI954624 A0 FI 954624A0 FI 954624 A FI954624 A FI 954624A FI 954624 A FI954624 A FI 954624A FI 954624 A0 FI954624 A0 FI 954624A0
- Authority
- FI
- Finland
- Prior art keywords
- phase locked
- inner loop
- digital phase
- locked inner
- digital
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0004—Initialisation of the receiver
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/314,830 US5463351A (en) | 1994-09-29 | 1994-09-29 | Nested digital phase lock loop |
Publications (2)
Publication Number | Publication Date |
---|---|
FI954624A0 true FI954624A0 (fi) | 1995-09-29 |
FI954624A FI954624A (fi) | 1996-03-30 |
Family
ID=23221637
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FI954624A FI954624A (fi) | 1994-09-29 | 1995-09-29 | Digitaalinen vaihelukittu sisäsilmukka |
Country Status (8)
Country | Link |
---|---|
US (1) | US5463351A (fi) |
JP (1) | JPH08237118A (fi) |
KR (1) | KR0173016B1 (fi) |
CN (1) | CN1050477C (fi) |
CA (1) | CA2158113C (fi) |
FI (1) | FI954624A (fi) |
FR (1) | FR2725332B1 (fi) |
GB (1) | GB2293706B (fi) |
Families Citing this family (57)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69434015D1 (de) * | 1993-02-26 | 2004-10-28 | Toshiba Kawasaki Kk | Raumdiversityempfänger für ein digitales Kommunikationssystem |
EP0629067B1 (en) * | 1993-06-11 | 2003-01-22 | STMicroelectronics Limited | 4B6B Coding |
DE4336239A1 (de) * | 1993-10-23 | 1995-04-27 | Sel Alcatel Ag | Schaltungsanordnung für einen Taktgenerator |
US5748763A (en) * | 1993-11-18 | 1998-05-05 | Digimarc Corporation | Image steganography system featuring perceptually adaptive and globally scalable signal embedding |
US5834980A (en) * | 1994-01-03 | 1998-11-10 | Lucent Technologies Inc. | Method and apparatus for supplying synchronization signals securing as clock signals with defined phase relationships |
US6560349B1 (en) | 1994-10-21 | 2003-05-06 | Digimarc Corporation | Audio monitoring using steganographic information |
JP2964912B2 (ja) * | 1995-04-28 | 1999-10-18 | 日本電気株式会社 | デジタルpll |
JPH08316805A (ja) * | 1995-05-16 | 1996-11-29 | Nec Corp | 周波数差検出回路 |
US5717730A (en) * | 1995-12-22 | 1998-02-10 | Microtune, Inc. | Multiple monolithic phase locked loops |
US5802450A (en) * | 1996-04-19 | 1998-09-01 | Ericsson Inc. | Transmit sequencing |
US5754598A (en) * | 1996-05-23 | 1998-05-19 | Motorola, Inc. | Method and apparatus for controlling a phase lock loop |
US5991632A (en) * | 1997-04-04 | 1999-11-23 | Casio Phonemate, Inc. | Cordless telephone and method of synchronization for secure, high-speed, high-volume data transfer |
US6259709B1 (en) * | 1997-05-02 | 2001-07-10 | Legerity, Inc. | Training preamble added to CT2 muxes in a CT2 wireless telecommunications system |
US5963606A (en) * | 1997-06-27 | 1999-10-05 | Sun Microsystems, Inc. | Phase error cancellation method and apparatus for high performance data recovery |
US6058151A (en) * | 1997-08-19 | 2000-05-02 | Realtek Semiconductor Corp. | Digital phase shift phase-locked loop for data and clock recovery |
SE510713C2 (sv) * | 1997-10-10 | 1999-06-14 | Ericsson Telefon Ab L M | Faslåsningskrets samt metod för reglering av spänningsstyrd oscillator |
US6600793B1 (en) * | 1998-09-30 | 2003-07-29 | Agere Systems Inc. | Minimal overhead early late timing recovery |
US6963884B1 (en) * | 1999-03-10 | 2005-11-08 | Digimarc Corporation | Recoverable digital content degradation: method and apparatus |
US6775344B1 (en) * | 1999-04-02 | 2004-08-10 | Storage Technology Corporation | Dropout resistant phase-locked loop |
JP4077979B2 (ja) * | 1999-05-27 | 2008-04-23 | 株式会社日立製作所 | 半導体集積回路装置 |
KR100604783B1 (ko) * | 1999-09-08 | 2006-07-26 | 삼성전자주식회사 | 지연동기루프 모드를 갖는 위상동기루프 회로 |
JP2001094417A (ja) | 1999-09-24 | 2001-04-06 | Toshiba Microelectronics Corp | デジタル方式pll回路 |
US6587694B1 (en) | 1999-09-24 | 2003-07-01 | Agere Systems Inc. | Clock synchronization between wireless devices during cradled time |
DE19948370A1 (de) * | 1999-10-06 | 2001-06-21 | Infineon Technologies Ag | Einrichtung und Verfahren zur Verarbeitung eines digitalen Datensignals in einem CDMA-Funksender |
WO2001043385A1 (de) * | 1999-12-07 | 2001-06-14 | Josef Dirr | Digitales übertragungsverfahren für bandbreiten- und bitratenflexibilität |
US6606360B1 (en) * | 1999-12-30 | 2003-08-12 | Intel Corporation | Method and apparatus for receiving data |
GB2363268B (en) * | 2000-06-08 | 2004-04-14 | Mitel Corp | Timing circuit with dual phase locked loops |
WO2002039586A2 (en) * | 2000-11-13 | 2002-05-16 | Primarion, Inc. | Method and system for synchronizing an output signal to a data signal |
US7010077B1 (en) * | 2000-11-20 | 2006-03-07 | Agere Systems Inc. | Gated clock recovery circuit |
US6798857B2 (en) * | 2000-12-01 | 2004-09-28 | Exar Corporation | Clock recovery circuit |
US6538516B2 (en) * | 2001-05-17 | 2003-03-25 | Fairchild Semiconductor Corporation | System and method for synchronizing multiple phase-lock loops or other synchronizable oscillators without using a master clock signal |
US6920622B1 (en) * | 2002-02-28 | 2005-07-19 | Silicon Laboratories Inc. | Method and apparatus for adjusting the phase of an output of a phase-locked loop |
US7469026B2 (en) * | 2002-03-07 | 2008-12-23 | The Aerospace Corporation | Random walk filter timing recovery loop |
JP4317212B2 (ja) * | 2003-03-20 | 2009-08-19 | アーム・リミテッド | 集積回路の処理段における系統的及び確率的誤り検出及び復旧 |
US7278080B2 (en) | 2003-03-20 | 2007-10-02 | Arm Limited | Error detection and recovery within processing stages of an integrated circuit |
US8185812B2 (en) * | 2003-03-20 | 2012-05-22 | Arm Limited | Single event upset error detection within an integrated circuit |
US8650470B2 (en) | 2003-03-20 | 2014-02-11 | Arm Limited | Error recovery within integrated circuit |
KR100504895B1 (ko) * | 2003-05-21 | 2005-07-29 | 엘지전자 주식회사 | 업라이트형 진공청소기의 마루바닥 보호장치 |
US7369578B2 (en) * | 2003-07-01 | 2008-05-06 | Nortel Networks Limited | Digital processing of SONET pointers |
US7817767B2 (en) * | 2004-12-23 | 2010-10-19 | Rambus Inc. | Processor-controlled clock-data recovery |
US20060140320A1 (en) * | 2004-12-23 | 2006-06-29 | Jensen Richard S | Mechanism to adjust a clock signal based on embedded clock information |
US7681063B2 (en) * | 2005-03-30 | 2010-03-16 | Infineon Technologies Ag | Clock data recovery circuit with circuit loop disablement |
US7751274B2 (en) * | 2006-09-05 | 2010-07-06 | Intel Corporation | Extended synchronized clock |
KR100721335B1 (ko) | 2006-12-13 | 2007-05-25 | (주)이노스 | Tdd 시스템에 사용되는 동기추출회로 및 동기신호를추출하는 방법 |
US7925156B2 (en) * | 2007-01-16 | 2011-04-12 | Broadlight, Ltd. | Apparatus and method for measuring the quality of burst signals and performing optical line diagnostics |
US8504865B2 (en) * | 2007-04-20 | 2013-08-06 | Easic Corporation | Dynamic phase alignment |
US8171386B2 (en) * | 2008-03-27 | 2012-05-01 | Arm Limited | Single event upset error detection within sequential storage circuitry of an integrated circuit |
US8161367B2 (en) * | 2008-10-07 | 2012-04-17 | Arm Limited | Correction of single event upset error within sequential storage circuitry of an integrated circuit |
JP4924630B2 (ja) * | 2009-02-06 | 2012-04-25 | 富士通株式会社 | クロック生成回路 |
US8238479B2 (en) * | 2009-03-13 | 2012-08-07 | Advanced Micro Devices, Inc. | Synchronization and acquisition for mobile television reception |
US8493120B2 (en) | 2011-03-10 | 2013-07-23 | Arm Limited | Storage circuitry and method with increased resilience to single event upsets |
US8687738B1 (en) * | 2011-04-01 | 2014-04-01 | Altera Corporation | Circuits and methods using a majority vote |
US9036755B2 (en) * | 2012-09-28 | 2015-05-19 | Liming Xiu | Circuits and methods for time-average frequency based clock data recovery |
US8958513B1 (en) * | 2013-03-15 | 2015-02-17 | Xilinx, Inc. | Clock and data recovery with infinite pull-in range |
CN103269220A (zh) * | 2013-05-30 | 2013-08-28 | 上海坤锐电子科技有限公司 | 基于数字琐相环的nfc有源负载调制的时钟恢复电路 |
CN105207673B (zh) * | 2015-10-26 | 2018-02-06 | 成都辰来科技有限公司 | 一种用于fpga芯片的高精度同步模块 |
CN111130617B (zh) * | 2019-12-10 | 2021-10-08 | 南京六九零二科技有限公司 | 一种双环结构的载波跟踪方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4019153A (en) * | 1974-10-07 | 1977-04-19 | The Charles Stark Draper Laboratory, Inc. | Digital phase-locked loop filter |
US3983498A (en) * | 1975-11-13 | 1976-09-28 | Motorola, Inc. | Digital phase lock loop |
US4574243A (en) * | 1984-01-03 | 1986-03-04 | Motorola, Inc. | Multiple frequency digital phase locked loop |
US4780844A (en) * | 1986-07-18 | 1988-10-25 | Commodore-Amiga, Inc. | Data input circuit with digital phase locked loop |
US5095498A (en) * | 1989-02-06 | 1992-03-10 | Motorola, Inc. | Bit synchronizer |
US5097489A (en) * | 1989-05-19 | 1992-03-17 | Tucci Patrick A | Method for incorporating window strobe in a data synchronizer |
FR2651937B1 (fr) * | 1989-09-14 | 1994-04-08 | Alcatel Espace | Transpondeur de mise a poste d'un satellite. |
JP2512586B2 (ja) * | 1990-03-08 | 1996-07-03 | 富士通株式会社 | フレ―ム同期依存型ビット同期抽出回路 |
US5055802A (en) * | 1990-04-30 | 1991-10-08 | Motorola, Inc. | Multiaccumulator sigma-delta fractional-n synthesis |
US5093632A (en) * | 1990-08-31 | 1992-03-03 | Motorola, Inc. | Latched accumulator fractional n synthesis with residual error reduction |
US5182761A (en) * | 1991-01-31 | 1993-01-26 | Motorola, Inc. | Data transmission system receiver having phase-independent bandwidth control |
US5271040A (en) * | 1991-12-20 | 1993-12-14 | Vlsi Technology, Inc. | Phase detector circuit |
US5333153A (en) * | 1992-01-21 | 1994-07-26 | Motorola, Inc. | Signal quality detection method and apparatus for optimum audio muting |
-
1994
- 1994-09-29 US US08/314,830 patent/US5463351A/en not_active Expired - Fee Related
-
1995
- 1995-09-12 CA CA002158113A patent/CA2158113C/en not_active Expired - Fee Related
- 1995-09-20 GB GB9519215A patent/GB2293706B/en not_active Expired - Fee Related
- 1995-09-25 FR FR9511212A patent/FR2725332B1/fr not_active Expired - Fee Related
- 1995-09-28 KR KR1019950032314A patent/KR0173016B1/ko not_active IP Right Cessation
- 1995-09-28 CN CN95117285A patent/CN1050477C/zh not_active Expired - Fee Related
- 1995-09-29 JP JP27513095A patent/JPH08237118A/ja active Pending
- 1995-09-29 FI FI954624A patent/FI954624A/fi unknown
Also Published As
Publication number | Publication date |
---|---|
KR960012812A (ko) | 1996-04-20 |
GB2293706B (en) | 1999-05-12 |
FR2725332B1 (fr) | 1999-10-08 |
JPH08237118A (ja) | 1996-09-13 |
GB2293706A (en) | 1996-04-03 |
FR2725332A1 (fr) | 1996-04-05 |
CN1129374A (zh) | 1996-08-21 |
US5463351A (en) | 1995-10-31 |
KR0173016B1 (ko) | 1999-03-30 |
GB9519215D0 (en) | 1995-11-22 |
CA2158113C (en) | 1999-08-17 |
FI954624A (fi) | 1996-03-30 |
CN1050477C (zh) | 2000-03-15 |
CA2158113A1 (en) | 1996-03-30 |
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