DE69202531D1 - Phasenregelschleife. - Google Patents

Phasenregelschleife.

Info

Publication number
DE69202531D1
DE69202531D1 DE69202531T DE69202531T DE69202531D1 DE 69202531 D1 DE69202531 D1 DE 69202531D1 DE 69202531 T DE69202531 T DE 69202531T DE 69202531 T DE69202531 T DE 69202531T DE 69202531 D1 DE69202531 D1 DE 69202531D1
Authority
DE
Germany
Prior art keywords
locked loop
phase locked
phase
loop
locked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69202531T
Other languages
English (en)
Other versions
DE69202531T2 (de
Inventor
Takashi Fujii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69202531D1 publication Critical patent/DE69202531D1/de
Application granted granted Critical
Publication of DE69202531T2 publication Critical patent/DE69202531T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/191Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using at least two different signals from the frequency divider or the counter for determining the time difference
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
DE69202531T 1991-07-31 1992-07-31 Phasenregelschleife. Expired - Fee Related DE69202531T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3215878A JP2993200B2 (ja) 1991-07-31 1991-07-31 位相同期ループ

Publications (2)

Publication Number Publication Date
DE69202531D1 true DE69202531D1 (de) 1995-06-22
DE69202531T2 DE69202531T2 (de) 1995-09-28

Family

ID=16679757

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69202531T Expired - Fee Related DE69202531T2 (de) 1991-07-31 1992-07-31 Phasenregelschleife.

Country Status (4)

Country Link
US (1) US5315269A (de)
EP (1) EP0526227B1 (de)
JP (1) JP2993200B2 (de)
DE (1) DE69202531T2 (de)

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JPH05291950A (ja) * 1992-04-15 1993-11-05 Mitsubishi Electric Corp フェーズロックドループ周波数シンセサイザ
JP3033654B2 (ja) * 1993-08-23 2000-04-17 日本電気株式会社 Pll周波数シンセサイザ
US5550515A (en) * 1995-01-27 1996-08-27 Opti, Inc. Multiphase clock synthesizer having a plurality of phase shifted inputs to a plurality of phase comparators in a phase locked loop
JP2964912B2 (ja) * 1995-04-28 1999-10-18 日本電気株式会社 デジタルpll
JP2817676B2 (ja) * 1995-07-31 1998-10-30 日本電気株式会社 Pll周波数シンセサイザ
JP2914297B2 (ja) * 1996-05-29 1999-06-28 日本電気株式会社 Pll周波数シンセサイザ
US5953386A (en) * 1996-06-20 1999-09-14 Lsi Logic Corporation High speed clock recovery circuit using complimentary dividers
US6912680B1 (en) 1997-02-11 2005-06-28 Micron Technology, Inc. Memory system with dynamic timing correction
JP3033520B2 (ja) * 1997-05-13 2000-04-17 日本電気株式会社 クロック抽出回路
US6173432B1 (en) * 1997-06-20 2001-01-09 Micron Technology, Inc. Method and apparatus for generating a sequence of clock signals
US6101197A (en) 1997-09-18 2000-08-08 Micron Technology, Inc. Method and apparatus for adjusting the timing of signals over fine and coarse ranges
US6100767A (en) * 1997-09-29 2000-08-08 Sanyo Electric Co., Ltd. Phase-locked loop with improved trade-off between lock-up time and power dissipation
US6137372A (en) * 1998-05-29 2000-10-24 Silicon Laboratories Inc. Method and apparatus for providing coarse and fine tuning control for synthesizing high-frequency signals for wireless communications
US6147567A (en) * 1998-05-29 2000-11-14 Silicon Laboratories Inc. Method and apparatus for providing analog and digitally controlled capacitances for synthesizing high-frequency signals for wireless communications
US6304146B1 (en) 1998-05-29 2001-10-16 Silicon Laboratories, Inc. Method and apparatus for synthesizing dual band high-frequency signals for wireless communications
US6150891A (en) * 1998-05-29 2000-11-21 Silicon Laboratories, Inc. PLL synthesizer having phase shifted control signals
US6327463B1 (en) 1998-05-29 2001-12-04 Silicon Laboratories, Inc. Method and apparatus for generating a variable capacitance for synthesizing high-frequency signals for wireless communications
US7092675B2 (en) * 1998-05-29 2006-08-15 Silicon Laboratories Apparatus and methods for generating radio frequencies in communication circuitry using multiple control signals
US6167245A (en) * 1998-05-29 2000-12-26 Silicon Laboratories, Inc. Method and apparatus for operating a PLL with a phase detector/sample hold circuit for synthesizing high-frequency signals for wireless communications
US6308055B1 (en) * 1998-05-29 2001-10-23 Silicon Laboratories, Inc. Method and apparatus for operating a PLL for synthesizing high-frequency signals for wireless communications
US7242912B2 (en) * 1998-05-29 2007-07-10 Silicon Laboratories Inc. Partitioning of radio-frequency apparatus
US7035607B2 (en) * 1998-05-29 2006-04-25 Silicon Laboratories Inc. Systems and methods for providing an adjustable reference signal to RF circuitry
US6574288B1 (en) 1998-05-29 2003-06-03 Silicon Laboratories Inc. Method and apparatus for adjusting a digital control word to tune synthesized high-frequency signals for wireless communications
US6233441B1 (en) 1998-05-29 2001-05-15 Silicon Laboratories, Inc. Method and apparatus for generating a discretely variable capacitance for synthesizing high-frequency signals for wireless communications
US6993314B2 (en) 1998-05-29 2006-01-31 Silicon Laboratories Inc. Apparatus for generating multiple radio frequencies in communication circuitry and associated methods
US6311050B1 (en) 1998-05-29 2001-10-30 Silicon Laboratories, Inc. Single integrated circuit phase locked loop for synthesizing high-frequency signals for wireless communications and method for operating same
US6226506B1 (en) 1998-05-29 2001-05-01 Silicon Laboratories, Inc. Method and apparatus for eliminating floating voltage nodes within a discreetly variable capacitance used for synthesizing high-frequency signals for wireless communications
US7221921B2 (en) * 1998-05-29 2007-05-22 Silicon Laboratories Partitioning of radio-frequency apparatus
US6349399B1 (en) 1998-09-03 2002-02-19 Micron Technology, Inc. Method and apparatus for generating expect data from a captured bit pattern, and memory device using same
US6470060B1 (en) * 1999-03-01 2002-10-22 Micron Technology, Inc. Method and apparatus for generating a phase dependent control signal
WO2001067613A1 (fr) * 2000-03-10 2001-09-13 Sanyo Electric Co., Ltd. Circuit pll
ATE302504T1 (de) * 2000-04-24 2005-09-15 Huawei Tech Co Ltd Verzögerungstaktimpulsbreiteneinstellschaltung für zwischenfrequenz oder hochfrequenz
US6323735B1 (en) 2000-05-25 2001-11-27 Silicon Laboratories, Inc. Method and apparatus for synthesizing high-frequency signals utilizing on-package oscillator circuit inductors
US20020084816A1 (en) * 2000-12-29 2002-07-04 Harris William A. Precision phase generator
US6801989B2 (en) * 2001-06-28 2004-10-05 Micron Technology, Inc. Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same
DE10132232C1 (de) * 2001-06-29 2002-11-21 Infineon Technologies Ag Phasendetektorschaltung für einen Phasenregelkreis
US6646477B1 (en) * 2002-02-27 2003-11-11 National Semiconductor Corporation Phase frequency detector with increased phase error gain
EP1351396B1 (de) * 2002-04-04 2006-02-15 Texas Instruments Incorporated Phasenregelschleife mit einer Ladungspumpe
US7092475B1 (en) * 2002-09-25 2006-08-15 National Semiconductor Corporation Phase-frequency detector with linear phase error gain near and during phase-lock in delta sigma phase-locked loop
GB2397956B (en) * 2003-01-29 2005-11-30 Phyworks Ltd Phase detector
EP1611684B3 (de) 2003-04-02 2019-01-02 Christopher Julian Travis Methode zur erzeugung eines oszillator-taktsignales
JP2004349735A (ja) * 2003-05-08 2004-12-09 Advantest Corp 信号処理装置
US7168027B2 (en) 2003-06-12 2007-01-23 Micron Technology, Inc. Dynamic synchronization of data capture on an optical or other high speed communications link
US7234070B2 (en) 2003-10-27 2007-06-19 Micron Technology, Inc. System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding
US7567642B2 (en) * 2003-12-23 2009-07-28 Analog Devices, Inc. Phase detector with extended linear operating range
JP2007088625A (ja) * 2005-09-20 2007-04-05 Kyushu Institute Of Technology Pll同期回路
US7990224B2 (en) * 2007-04-27 2011-08-02 Atmel Corporation Dual reference phase tracking phase-locked loop
EP2191572A1 (de) * 2007-09-21 2010-06-02 QUALCOMM Incorporated Signalgenerator mit einstellbarer phase
JPWO2010143241A1 (ja) * 2009-06-10 2012-11-22 パナソニック株式会社 デジタルpll回路、半導体集積回路、表示装置
FR2957212B1 (fr) * 2010-03-05 2012-11-16 Commissariat Energie Atomique Dispositif de synthese de frequence a boucle de retroaction
JP2011205328A (ja) * 2010-03-25 2011-10-13 Toshiba Corp 局部発振器
US8432191B2 (en) 2011-01-24 2013-04-30 Avago Technologies General Ip (Singapore) Pte. Ltd. Phase-locked loop having high-gain mode phase-frequency detector
US20200162084A1 (en) * 2018-11-16 2020-05-21 Avago Technologies International Sales Pte. Limited Fbar-based local oscillator generation

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3571743A (en) * 1968-10-30 1971-03-23 Rca Corp Phase lock loop
CA1284361C (en) * 1986-08-29 1991-05-21 Mitel Corporation Analog phase locked loop
US4888564A (en) * 1987-11-06 1989-12-19 Victor Company Of Japan, Ltd. Phase-locked loop circuit
US5208546A (en) * 1991-08-21 1993-05-04 At&T Bell Laboratories Adaptive charge pump for phase-locked loops

Also Published As

Publication number Publication date
JPH0537364A (ja) 1993-02-12
JP2993200B2 (ja) 1999-12-20
EP0526227A2 (de) 1993-02-03
US5315269A (en) 1994-05-24
EP0526227A3 (en) 1993-05-05
DE69202531T2 (de) 1995-09-28
EP0526227B1 (de) 1995-05-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee