ATE302504T1 - Verzögerungstaktimpulsbreiteneinstellschaltung für zwischenfrequenz oder hochfrequenz - Google Patents

Verzögerungstaktimpulsbreiteneinstellschaltung für zwischenfrequenz oder hochfrequenz

Info

Publication number
ATE302504T1
ATE302504T1 AT01935925T AT01935925T ATE302504T1 AT E302504 T1 ATE302504 T1 AT E302504T1 AT 01935925 T AT01935925 T AT 01935925T AT 01935925 T AT01935925 T AT 01935925T AT E302504 T1 ATE302504 T1 AT E302504T1
Authority
AT
Austria
Prior art keywords
input terminal
clock signal
circuit
ratio
duty
Prior art date
Application number
AT01935925T
Other languages
English (en)
Inventor
Dengqing Huawei Yin
Original Assignee
Huawei Tech Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CNB001059971A external-priority patent/CN1152288C/zh
Priority claimed from CN 00105996 external-priority patent/CN1129054C/zh
Application filed by Huawei Tech Co Ltd filed Critical Huawei Tech Co Ltd
Application granted granted Critical
Publication of ATE302504T1 publication Critical patent/ATE302504T1/de

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/08Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
    • H03K5/082Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold
    • H03K5/086Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold generated by feedback
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
    • H03K5/1565Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Networks Using Active Elements (AREA)
  • Control Of Motors That Do Not Use Commutators (AREA)
  • Optical Radar Systems And Details Thereof (AREA)
  • Investigating Or Analysing Materials By Optical Means (AREA)
AT01935925T 2000-04-24 2001-04-19 Verzögerungstaktimpulsbreiteneinstellschaltung für zwischenfrequenz oder hochfrequenz ATE302504T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CNB001059971A CN1152288C (zh) 2000-04-24 2000-04-24 中高频短延迟时钟脉宽调整电路
CN 00105996 CN1129054C (zh) 2000-04-24 2000-04-24 长延迟时钟脉宽调整电路
PCT/CN2001/000563 WO2001082485A1 (fr) 2000-04-24 2001-04-19 Circuit de reglage de la largeur d'impulsion d'une horloge de retard a haute et moyenne frequences

Publications (1)

Publication Number Publication Date
ATE302504T1 true ATE302504T1 (de) 2005-09-15

Family

ID=25739270

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01935925T ATE302504T1 (de) 2000-04-24 2001-04-19 Verzögerungstaktimpulsbreiteneinstellschaltung für zwischenfrequenz oder hochfrequenz

Country Status (9)

Country Link
US (1) US6801068B2 (de)
EP (1) EP1289149B1 (de)
JP (1) JP4354145B2 (de)
KR (1) KR100651150B1 (de)
AT (1) ATE302504T1 (de)
AU (1) AU6201501A (de)
DE (1) DE60112749D1 (de)
FI (1) FI20021878A (de)
WO (1) WO2001082485A1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030084487A (ko) * 2002-04-27 2003-11-01 주식회사 하이닉스반도체 듀티 보정 회로
WO2004049569A1 (en) * 2002-11-22 2004-06-10 Koninklijke Philips Electronics N.V. Pwm generator
US7245102B1 (en) * 2003-10-24 2007-07-17 University Of Illinois At Urbana-Champaign Method and system of compensating wave reflections in transmission lines
KR100608355B1 (ko) * 2004-03-25 2006-08-08 주식회사 하이닉스반도체 메모리 장치의 동작 주파수 변동에 따른 내부 제어 신호의인에이블 구간을 제어하는 장치와 그 방법
US7088160B2 (en) * 2004-04-08 2006-08-08 Infineon Technologies Ag Circuit arrangement for regulating a parameter of an electrical signal
KR100868014B1 (ko) * 2007-02-12 2008-11-11 주식회사 하이닉스반도체 듀티 사이클 보정 회로 및 그 제어 방법
US7821798B2 (en) * 2007-03-16 2010-10-26 Samsung Electronics Co. Ltd High voltage power supply
KR100855008B1 (ko) * 2007-04-25 2008-08-28 한국전기연구원 다중 스킵 모드 제어 신호 발생기
KR100861920B1 (ko) * 2007-05-10 2008-10-09 삼성전자주식회사 비대칭형 펄스폭 변조 신호 발생기 및 그 방법
KR101659840B1 (ko) * 2010-03-11 2016-09-30 삼성전자주식회사 스큐드 게이트 타입 듀티 교정회로를 갖는 디지털 지연 동기 루프 및 그의 듀티 교정방법
TWI444091B (zh) * 2011-08-12 2014-07-01 Raydium Semiconductor Corp 發光二極體驅動裝置
CN102957312B (zh) * 2011-08-19 2015-02-11 立锜科技股份有限公司 具有过电流保护的电源供应器及其控制电路与保护方法
US20130070379A1 (en) * 2011-09-21 2013-03-21 Richtek Technology Corporation, R.O.C. Power regulator with over current protection and control circuit thereof and method of over current protection
KR101284751B1 (ko) * 2012-01-16 2013-07-17 단국대학교 산학협력단 클록 발생회로
JP5657596B2 (ja) * 2012-03-26 2015-01-21 株式会社東芝 近接妨害除去フィルタ装置、無線通信装置およびキーレスエントリー装置
DE102013201686A1 (de) * 2013-02-01 2014-08-21 Siemens Aktiengesellschaft Verfahren und Schaltungsanordnung zur Wandlung eines Sinussignals in ein Rechtecksignal, sowie Verwendung hierfür
DE102017114526A1 (de) * 2017-06-29 2019-01-03 Hanon Systems Verfahren zur Ansteuerung von Leistungshalbleitern in einem Inverter
CN109067366B (zh) * 2018-07-31 2022-03-25 京信网络系统股份有限公司 一种GaN功率放大器供电控制电路、上掉电控制方法
CN110830011B (zh) * 2018-08-07 2023-03-24 瑞昱半导体股份有限公司 具有脉宽调整模块的时钟电路
CN108988829B (zh) * 2018-09-29 2024-01-09 华东师范大学 一种高速随机信号脉冲驱动器
CN114812317B (zh) * 2022-04-19 2023-07-04 华东光电集成器件研究所 一种数码雷管通信解调接口电路、信号处理系统及方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5077652A (en) * 1990-10-18 1991-12-31 Dynamote Corporation Dual feedback loop DC-to-AC converter
US5115205A (en) * 1990-12-28 1992-05-19 Square D Company AC amplifier with automatic DC compensation
JP2993200B2 (ja) * 1991-07-31 1999-12-20 日本電気株式会社 位相同期ループ
JP3691861B2 (ja) * 1994-09-14 2005-09-07 株式会社東芝 光ディスク用光パルス幅制御装置
KR0138220B1 (ko) * 1994-12-30 1998-05-15 김주용 위상동기루프회로의 클럭지연보상 및 듀티제어 장치
JP3557059B2 (ja) * 1996-11-27 2004-08-25 富士通株式会社 パルス幅制御装置
KR100233373B1 (ko) * 1997-06-09 1999-12-01 김덕중 펄스폭 변조 제어기

Also Published As

Publication number Publication date
JP4354145B2 (ja) 2009-10-28
FI20021878A (fi) 2002-10-29
WO2001082485A1 (fr) 2001-11-01
AU6201501A (en) 2001-11-07
EP1289149A1 (de) 2003-03-05
EP1289149B1 (de) 2005-08-17
JP2003532326A (ja) 2003-10-28
EP1289149A9 (de) 2003-11-05
WO2001082485A9 (fr) 2002-09-19
US20030112044A1 (en) 2003-06-19
DE60112749D1 (de) 2005-09-22
US6801068B2 (en) 2004-10-05
KR100651150B1 (ko) 2006-11-28
KR20030047884A (ko) 2003-06-18

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