DE60114733D1 - Phasenregelschleife mit verringerter Verriegelungszeit - Google Patents

Phasenregelschleife mit verringerter Verriegelungszeit

Info

Publication number
DE60114733D1
DE60114733D1 DE60114733T DE60114733T DE60114733D1 DE 60114733 D1 DE60114733 D1 DE 60114733D1 DE 60114733 T DE60114733 T DE 60114733T DE 60114733 T DE60114733 T DE 60114733T DE 60114733 D1 DE60114733 D1 DE 60114733D1
Authority
DE
Germany
Prior art keywords
locked loop
phase locked
lock time
reduced lock
reduced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60114733T
Other languages
English (en)
Other versions
DE60114733T2 (de
Inventor
Brian P Sutton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tektronix Inc
Original Assignee
Tektronix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tektronix Inc filed Critical Tektronix Inc
Publication of DE60114733D1 publication Critical patent/DE60114733D1/de
Application granted granted Critical
Publication of DE60114733T2 publication Critical patent/DE60114733T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
    • H03L7/189—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop comprising a D/A converter for generating a coarse tuning voltage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals
DE60114733T 2000-08-24 2001-08-15 Phasenregelschleife mit verringerter Verriegelungszeit Expired - Lifetime DE60114733T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US645212 2000-08-24
US09/645,212 US6380810B1 (en) 2000-08-24 2000-08-24 Reduced lock time for a phase locked loop

Publications (2)

Publication Number Publication Date
DE60114733D1 true DE60114733D1 (de) 2005-12-15
DE60114733T2 DE60114733T2 (de) 2006-07-20

Family

ID=24588088

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60114733T Expired - Lifetime DE60114733T2 (de) 2000-08-24 2001-08-15 Phasenregelschleife mit verringerter Verriegelungszeit

Country Status (4)

Country Link
US (1) US6380810B1 (de)
EP (1) EP1182780B1 (de)
JP (1) JP4038030B2 (de)
DE (1) DE60114733T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6597249B2 (en) * 2001-09-04 2003-07-22 Prominenet Communications, Inc. Fast coarse tuning control for PLL frequency synthesizer
US6639476B1 (en) * 2002-05-07 2003-10-28 Sullivan William B Correlator stabilized digitally tuned oscillator synthesizer
US7019595B1 (en) * 2002-10-25 2006-03-28 Ralink Technology, Inc. Frequency synthesizer with automatic tuning control to increase tuning range
US7053719B2 (en) * 2004-03-11 2006-05-30 Agilent Technologies, Inc. Controlling a voltage controlled oscillator in a bang-bang phase locked loop
US7177611B2 (en) * 2004-07-07 2007-02-13 Texas Instruments Incorporated Hybrid control of phase locked loops
DE102005006345A1 (de) * 2005-02-11 2006-08-24 Rohde & Schwarz Gmbh & Co. Kg PLL-Synthesizer mit verbesserter VCO Vorabstimmung
US7683596B1 (en) * 2005-06-24 2010-03-23 Summit Microelectronics, Inc. Method for regulating an output voltage of a DC/DC converter using an active DC output control circuit
US9350366B2 (en) 2013-10-18 2016-05-24 Raytheon Company Phase-locked loop filter with coarse and fine tuning
CN115296680B (zh) * 2022-10-08 2023-02-10 深圳捷扬微电子有限公司 一种应用于超宽带的射频接收机电路

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4562410A (en) * 1983-12-29 1985-12-31 Rca Corporation Phase lock loop prepositioning apparatus with feedback control
US5546053A (en) * 1994-07-27 1996-08-13 Texas Instruments Incorporated Phase locked loop having booster circuit for rapid lockup
GB9415185D0 (en) * 1994-07-28 1994-09-21 Thomson Consumer Electronics Fast acting control system

Also Published As

Publication number Publication date
EP1182780B1 (de) 2005-11-09
EP1182780A2 (de) 2002-02-27
JP2002124876A (ja) 2002-04-26
US6380810B1 (en) 2002-04-30
EP1182780A3 (de) 2003-05-02
JP4038030B2 (ja) 2008-01-23
DE60114733T2 (de) 2006-07-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition