DE60219585D1 - Frequenzsynthesizer mit Phasenrücksetzung - Google Patents

Frequenzsynthesizer mit Phasenrücksetzung

Info

Publication number
DE60219585D1
DE60219585D1 DE60219585T DE60219585T DE60219585D1 DE 60219585 D1 DE60219585 D1 DE 60219585D1 DE 60219585 T DE60219585 T DE 60219585T DE 60219585 T DE60219585 T DE 60219585T DE 60219585 D1 DE60219585 D1 DE 60219585D1
Authority
DE
Germany
Prior art keywords
frequency synthesizer
phase reset
reset
phase
synthesizer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60219585T
Other languages
English (en)
Other versions
DE60219585T2 (de
Inventor
Robert B Staszewski
Kenneth Maggio
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE60219585D1 publication Critical patent/DE60219585D1/de
Publication of DE60219585T2 publication Critical patent/DE60219585T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
DE60219585T 2001-11-30 2002-11-28 Frequenzsynthesizer mit Phasenrücksetzung Expired - Lifetime DE60219585T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US8462 2001-11-30
US10/008,462 US7006589B2 (en) 2001-04-25 2001-11-30 Frequency synthesizer with phase restart

Publications (2)

Publication Number Publication Date
DE60219585D1 true DE60219585D1 (de) 2007-05-31
DE60219585T2 DE60219585T2 (de) 2007-12-20

Family

ID=21731729

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60219585T Expired - Lifetime DE60219585T2 (de) 2001-11-30 2002-11-28 Frequenzsynthesizer mit Phasenrücksetzung

Country Status (3)

Country Link
US (1) US7006589B2 (de)
EP (1) EP1330034B1 (de)
DE (1) DE60219585T2 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1501223A1 (de) * 2000-05-11 2005-01-26 Matsushita Electric Industrial Co., Ltd. Interferenzkompensator und Verfahren zur Kompensation einer Interferenz
DE10345497B4 (de) * 2003-09-30 2006-12-21 Infineon Technologies Ag Oszillatorschaltung, insbesondere für den Mobilfunk
US7221704B2 (en) 2005-08-01 2007-05-22 Marvell World Trade Ltd. All digital implementation of clock spectrum spreading (dither) for low power/die area
US8350634B2 (en) * 2006-09-06 2013-01-08 Glacier Microelectronics VCO with independently controllable parameters
US7715515B2 (en) * 2006-10-19 2010-05-11 Telefonaktiebolaget Lm Ericsson (Publ) Method and apparatus for reducing non-montonic regions in a digitally controlled oscillator
US8284822B2 (en) * 2007-02-27 2012-10-09 Broadcom Corporation Method and system for utilizing direct digital frequency synthesis to process signals in multi-band applications
US7826550B2 (en) * 2007-02-28 2010-11-02 Broadcom Corp. Method and system for a high-precision frequency generator using a direct digital frequency synthesizer for transmitters and receivers
US20080205550A1 (en) * 2007-02-28 2008-08-28 Ahmadreza Rofougaran Method and System for Using a Phase Locked Loop for Upconversion in a Wideband Polar Transmitter
US20080205545A1 (en) * 2007-02-28 2008-08-28 Ahmadreza Rofougaran Method and System for Using a Phase Locked Loop for Upconversion in a Wideband Crystalless Polar Transmitter
US8116387B2 (en) * 2007-03-01 2012-02-14 Broadcom Corporation Method and system for a digital polar transmitter
JP5367075B2 (ja) 2009-05-22 2013-12-11 パナソニック株式会社 Ｐｌｌ周波数シンセサイザ
US20150116012A1 (en) * 2013-10-30 2015-04-30 Hasnain Lakdawala Digital Voltage Ramp Generator
JP2017130888A (ja) 2016-01-22 2017-07-27 株式会社東芝 受信機、集積回路、無線通信装置および無線通信方法
KR102440369B1 (ko) 2018-01-22 2022-09-05 삼성전자주식회사 3단 셀들을 사용하는 디지털-아날로그 변환을 위한 회로 및 방법
CN109283832B (zh) * 2018-09-14 2020-05-12 东北大学 一种低功耗的时间数字转换器及其phv补偿方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4965531A (en) * 1989-11-22 1990-10-23 Carleton University Frequency synthesizers having dividing ratio controlled by sigma-delta modulator
US5302920A (en) * 1992-10-13 1994-04-12 Ncr Corporation Controllable multi-phase ring oscillators with variable current sources and capacitances
US5446420A (en) 1993-08-25 1995-08-29 Motorola, Inc. Method and apparatus for reducing jitter and improving testability of an oscillator
JPH08107352A (ja) * 1994-10-04 1996-04-23 Hitachi Ltd 位相同期システム
US6028488A (en) * 1996-11-08 2000-02-22 Texas Instruments Incorporated Digitally-controlled oscillator with switched-capacitor frequency selection
US6226506B1 (en) * 1998-05-29 2001-05-01 Silicon Laboratories, Inc. Method and apparatus for eliminating floating voltage nodes within a discreetly variable capacitance used for synthesizing high-frequency signals for wireless communications
US6194973B1 (en) * 1998-05-29 2001-02-27 Intel Corporation Oscillator with automatic gain control
US6094105A (en) * 1998-05-29 2000-07-25 Intel Corporation Oscillator with digital frequency control
JP3313671B2 (ja) * 1999-08-12 2002-08-12 日本電気株式会社 デジタル制御型発振回路

Also Published As

Publication number Publication date
EP1330034A3 (de) 2004-10-27
DE60219585T2 (de) 2007-12-20
EP1330034A2 (de) 2003-07-23
US7006589B2 (en) 2006-02-28
US20020159555A1 (en) 2002-10-31
EP1330034B1 (de) 2007-04-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition