DE10195904T1 - Phasendetektor - Google Patents

Phasendetektor

Info

Publication number
DE10195904T1
DE10195904T1 DE10195904T DE10195904T DE10195904T1 DE 10195904 T1 DE10195904 T1 DE 10195904T1 DE 10195904 T DE10195904 T DE 10195904T DE 10195904 T DE10195904 T DE 10195904T DE 10195904 T1 DE10195904 T1 DE 10195904T1
Authority
DE
Germany
Prior art keywords
phase detector
detector
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE10195904T
Other languages
English (en)
Other versions
DE10195904B4 (de
Inventor
Henrik Ingvar Johansen
Henning Lysdal
Benny Christensen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Copenhagen ApS
Original Assignee
Giga AS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Giga AS filed Critical Giga AS
Publication of DE10195904T1 publication Critical patent/DE10195904T1/de
Application granted granted Critical
Publication of DE10195904B4 publication Critical patent/DE10195904B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D13/00Circuits for comparing the phase or frequency of two mutually-independent oscillations
    • H03D13/003Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means
    • H03D13/004Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means the logic means delivering pulses at more than one terminal, e.g. up and down pulses
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
DE10195904T 2000-03-15 2001-03-15 Phasendetektor Expired - Fee Related DE10195904B4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/525,459 US6538475B1 (en) 2000-03-15 2000-03-15 Phase detector
PCT/DK2001/000175 WO2001069786A2 (en) 2000-03-15 2001-03-15 A phase detector

Publications (2)

Publication Number Publication Date
DE10195904T1 true DE10195904T1 (de) 2003-03-13
DE10195904B4 DE10195904B4 (de) 2005-03-10

Family

ID=24093343

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10195904T Expired - Fee Related DE10195904B4 (de) 2000-03-15 2001-03-15 Phasendetektor

Country Status (7)

Country Link
US (1) US6538475B1 (de)
CN (1) CN100403652C (de)
AU (1) AU2001242305A1 (de)
CA (1) CA2400830C (de)
DE (1) DE10195904B4 (de)
GB (1) GB2377566B (de)
WO (1) WO2001069786A2 (de)

Families Citing this family (37)

* Cited by examiner, † Cited by third party
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US6590427B2 (en) * 2001-01-03 2003-07-08 Seagate Technology Llc Phase frequency detector circuit having reduced dead band
US6822483B1 (en) * 2002-04-09 2004-11-23 Applied Micro Circuits Corporation No resonance mode bang-bang phase detector
TWI298223B (en) * 2002-11-04 2008-06-21 Mstar Semiconductor Inc Data recovery circuit, phase detection circuit and method for detecting and correcting phase conditions
US20040114702A1 (en) * 2002-12-12 2004-06-17 International Business Machines Corporation Bang-bang phase detector for full-rate and half-rate schemes clock and data recovery and method therefor
WO2004086603A1 (en) * 2003-03-28 2004-10-07 Koninklijke Philips Electronics N.V. Frequency detector system with tri-state frequency control signal
US7466787B1 (en) * 2004-11-19 2008-12-16 Xilinx, Inc. Multi-stage phase detector
CN101189791A (zh) * 2005-05-24 2008-05-28 菲尼萨公司 噪声容限压控振荡器
US7873132B2 (en) * 2005-09-21 2011-01-18 Hewlett-Packard Development Company, L.P. Clock recovery
US20070170959A1 (en) * 2006-01-24 2007-07-26 Alessandro Minzoni Phase detector
US7571363B2 (en) * 2006-05-18 2009-08-04 Agilent Technologies, Inc. Parametric measurement of high-speed I/O systems
US8004326B2 (en) * 2006-12-21 2011-08-23 Icera Canada ULC Digital charge pump PLL architecture
US7633322B1 (en) * 2007-04-06 2009-12-15 Altera Corporation Digital loop circuit for programmable logic device
US7940088B1 (en) 2009-03-31 2011-05-10 Pmc-Sierra, Inc. High speed phase frequency detector
US8467436B1 (en) 2009-04-29 2013-06-18 Pmc-Sierra Us, Inc. DSP-based diagnostics for monitoring a SerDes link
EP2252003A1 (de) * 2009-05-12 2010-11-17 CoreOptics Inc. Phasenbestimmungsverfahren und Phasendetektor
TWI478500B (zh) * 2009-09-23 2015-03-21 Richwave Technology Corp 數位鎖相迴路、頻率調整方法和整合式接收器
CN102055470A (zh) * 2009-11-10 2011-05-11 立积电子股份有限公司 数字锁相回路、频率调整方法和整合式接收器
CN102347765B (zh) * 2010-07-26 2013-10-16 中兴通讯股份有限公司 一种时钟与数据恢复系统、相位调整方法及鉴相器
US8634510B2 (en) 2011-01-12 2014-01-21 Qualcomm Incorporated Full digital bang bang frequency detector with no data pattern dependency
US9413295B1 (en) 2013-03-15 2016-08-09 Gsi Technology, Inc. Systems and methods of phase frequency detection with clock edge overriding reset, extending detection range, improvement of cycle slipping and/or other features
CN106549666A (zh) * 2015-09-21 2017-03-29 晨星半导体股份有限公司 相位侦测器、时钟与数据恢复电路、以及相关的控制方法
US10951389B2 (en) * 2015-11-30 2021-03-16 Sony Semiconductor Solutions Corporation Phase detector, phase synchronization circuit, and method of controlling phase synchronization circuit
US10854284B1 (en) 2016-12-06 2020-12-01 Gsi Technology, Inc. Computational memory cell and processing array device with ratioless write port
US10860320B1 (en) 2016-12-06 2020-12-08 Gsi Technology, Inc. Orthogonal data transposition system and method during data transfers to/from a processing array
US10847212B1 (en) 2016-12-06 2020-11-24 Gsi Technology, Inc. Read and write data processing circuits and methods associated with computational memory cells using two read multiplexers
US10770133B1 (en) 2016-12-06 2020-09-08 Gsi Technology, Inc. Read and write data processing circuits and methods associated with computational memory cells that provides write inhibits and read bit line pre-charge inhibits
US10777262B1 (en) 2016-12-06 2020-09-15 Gsi Technology, Inc. Read data processing circuits and methods associated memory cells
US11227653B1 (en) 2016-12-06 2022-01-18 Gsi Technology, Inc. Storage array circuits and methods for computational memory cells
US10847213B1 (en) 2016-12-06 2020-11-24 Gsi Technology, Inc. Write data processing circuits and methods associated with computational memory cells
US10998040B2 (en) 2016-12-06 2021-05-04 Gsi Technology, Inc. Computational memory cell and processing array device using the memory cells for XOR and XNOR computations
US10521229B2 (en) 2016-12-06 2019-12-31 Gsi Technology, Inc. Computational memory cell and processing array device using memory cells
US10943648B1 (en) 2016-12-06 2021-03-09 Gsi Technology, Inc. Ultra low VDD memory cell with ratioless write port
US10891076B1 (en) 2016-12-06 2021-01-12 Gsi Technology, Inc. Results processing circuits and methods associated with computational memory cells
US10958272B2 (en) 2019-06-18 2021-03-23 Gsi Technology, Inc. Computational memory cell and processing array device using complementary exclusive or memory cells
US10877731B1 (en) 2019-06-18 2020-12-29 Gsi Technology, Inc. Processing array device that performs one cycle full adder operation and bit line read/write logic features
US10930341B1 (en) 2019-06-18 2021-02-23 Gsi Technology, Inc. Processing array device that performs one cycle full adder operation and bit line read/write logic features
CN112187257A (zh) * 2020-10-16 2021-01-05 广西师范大学 一种高速低抖动数据同步鉴相器

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4819251A (en) 1988-05-06 1989-04-04 Rockwell International Corporation High speed non-return-to-zero digital clock recovery apparatus
JP2522413B2 (ja) * 1989-10-17 1996-08-07 日本電気株式会社 位相周波数比較器
KR960002463B1 (ko) 1993-12-11 1996-02-17 한국전기통신공사 고속데이타 전송에서의 디지틀 데이타 리타이밍 장치
US5455540A (en) 1994-10-26 1995-10-03 Cypress Semiconductor Corp. Modified bang-bang phase detector with ternary output
US5719908A (en) 1995-07-19 1998-02-17 Unisys Corporation Digital/analog bit synchronizer
EP1032133A1 (de) * 1999-02-23 2000-08-30 Siemens Aktiengesellschaft Phasenregelkreis mit geringem Phasenfehler

Also Published As

Publication number Publication date
US6538475B1 (en) 2003-03-25
GB0223748D0 (en) 2002-11-20
GB2377566B (en) 2004-06-02
CN100403652C (zh) 2008-07-16
CA2400830A1 (en) 2001-09-20
WO2001069786A2 (en) 2001-09-20
CA2400830C (en) 2006-02-14
WO2001069786A3 (en) 2002-02-07
CN1418402A (zh) 2003-05-14
DE10195904B4 (de) 2005-03-10
GB2377566A (en) 2003-01-15
AU2001242305A1 (en) 2001-09-24

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