CN102347765B - 一种时钟与数据恢复系统、相位调整方法及鉴相器 - Google Patents
一种时钟与数据恢复系统、相位调整方法及鉴相器 Download PDFInfo
- Publication number
- CN102347765B CN102347765B CN2010102451708A CN201010245170A CN102347765B CN 102347765 B CN102347765 B CN 102347765B CN 2010102451708 A CN2010102451708 A CN 2010102451708A CN 201010245170 A CN201010245170 A CN 201010245170A CN 102347765 B CN102347765 B CN 102347765B
- Authority
- CN
- China
- Prior art keywords
- bias current
- signal
- err
- source circuit
- current source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 39
- 238000011084 recovery Methods 0.000 title claims description 16
- 238000005070 sampling Methods 0.000 description 15
- 238000003491 array Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 230000008878 coupling Effects 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000005859 coupling reaction Methods 0.000 description 4
- 230000003044 adaptive effect Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- VIKNJXKGJWUCNN-XGXHKTLJSA-N norethisterone Chemical compound O=C1CC[C@@H]2[C@H]3CC[C@](C)([C@](CC4)(O)C#C)[C@@H]4[C@@H]3CCC2=C1 VIKNJXKGJWUCNN-XGXHKTLJSA-N 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/0807—Details of the phase-locked loop concerning mainly a recovery circuit for the reference signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
Abstract
Description
Claims (10)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010102451708A CN102347765B (zh) | 2010-07-26 | 2010-07-26 | 一种时钟与数据恢复系统、相位调整方法及鉴相器 |
AU2011285387A AU2011285387B2 (en) | 2010-07-26 | 2011-04-18 | Clock and data recovery system, phase adjusting method, and phasedetector |
US13/575,595 US8624630B2 (en) | 2010-07-26 | 2011-04-18 | Clock and data recovery system, phase adjusting method, and phasedetector |
EP11811753.0A EP2515441B1 (en) | 2010-07-26 | 2011-04-18 | Clock and data recovery system, phase adjusting method, and phasedetector |
PCT/CN2011/072954 WO2012013051A1 (zh) | 2010-07-26 | 2011-04-18 | 时钟与数据恢复系统、相位调整方法及鉴相器 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010102451708A CN102347765B (zh) | 2010-07-26 | 2010-07-26 | 一种时钟与数据恢复系统、相位调整方法及鉴相器 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102347765A CN102347765A (zh) | 2012-02-08 |
CN102347765B true CN102347765B (zh) | 2013-10-16 |
Family
ID=45529393
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2010102451708A Active CN102347765B (zh) | 2010-07-26 | 2010-07-26 | 一种时钟与数据恢复系统、相位调整方法及鉴相器 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8624630B2 (zh) |
EP (1) | EP2515441B1 (zh) |
CN (1) | CN102347765B (zh) |
AU (1) | AU2011285387B2 (zh) |
WO (1) | WO2012013051A1 (zh) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102843130B (zh) * | 2012-09-18 | 2014-10-08 | 北京大学 | 基于cml逻辑的相位检测器 |
JP2014140100A (ja) * | 2013-01-21 | 2014-07-31 | Sony Corp | 位相比較回路及びデータ受信装置 |
CN103762945A (zh) * | 2014-01-20 | 2014-04-30 | 复旦大学 | 一种相位可调的精确正交压控振荡器电路 |
US9288019B2 (en) * | 2014-07-03 | 2016-03-15 | Intel Corporation | Apparatuses, methods, and systems for jitter equalization and phase error detection |
CN108390675B (zh) * | 2018-05-15 | 2024-02-02 | 南京德睿智芯电子科技有限公司 | 一种异或门鉴相器 |
CN111371430B (zh) * | 2018-12-26 | 2023-08-08 | 深圳市中兴微电子技术有限公司 | 一种矢量合成移相器和矢量合成移相方法 |
CN113364278B (zh) * | 2020-04-08 | 2022-07-12 | 澜起电子科技(昆山)有限公司 | 开关电流源电路及开关电流源快速建立方法 |
CN112202426B (zh) * | 2020-10-16 | 2024-05-10 | 中国科学院微电子研究所 | 应用于多速率的高线性度的相位插值器及采用其的电路 |
CN116027842B (zh) * | 2023-03-24 | 2023-06-23 | 长鑫存储技术有限公司 | 功率控制电路、存储器及电子设备 |
CN117254894B (zh) * | 2023-11-20 | 2024-03-19 | 西安智多晶微电子有限公司 | 自动校正高速串行信号采样相位的方法、装置及电子设备 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5799048A (en) * | 1996-04-17 | 1998-08-25 | Sun Microsystems, Inc. | Phase detector for clock synchronization and recovery |
US7409027B1 (en) * | 2002-06-14 | 2008-08-05 | Cypress Semiconductor Corp. | System and method for recovering a clock using a reduced rate linear phase detector and voltage controlled oscillator |
CN101572527A (zh) * | 2009-06-09 | 2009-11-04 | 中国人民解放军国防科学技术大学 | 高速高抖动容限的随机数据线性鉴相器电路 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6847789B2 (en) | 2000-02-17 | 2005-01-25 | Broadcom Corporation | Linear half-rate phase detector and clock and data recovery circuit |
US6538475B1 (en) * | 2000-03-15 | 2003-03-25 | Intel Corporation | Phase detector |
US6509801B1 (en) * | 2001-06-29 | 2003-01-21 | Sierra Monolithics, Inc. | Multi-gigabit-per-sec clock recovery apparatus and method for optical communications |
US7092474B2 (en) * | 2001-09-18 | 2006-08-15 | Broadcom Corporation | Linear phase detector for high-speed clock and data recovery |
US7386085B2 (en) | 2002-05-30 | 2008-06-10 | Broadcom Corporation | Method and apparatus for high speed signal recovery |
US7286625B2 (en) * | 2003-02-07 | 2007-10-23 | The Regents Of The University Of California | High-speed clock and data recovery circuit |
US7057418B1 (en) * | 2004-04-13 | 2006-06-06 | Applied Micro Circuits Corporation | High speed linear half-rate phase detector |
JP4081067B2 (ja) * | 2004-11-08 | 2008-04-23 | 富士通株式会社 | 位相比較器及び位相比較器を有する半導体装置 |
US7609798B2 (en) * | 2004-12-29 | 2009-10-27 | Silicon Laboratories Inc. | Calibrating a phase detector and analog-to-digital converter offset and gain |
US7173494B2 (en) * | 2005-01-20 | 2007-02-06 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Method and system for operating a feedback system for a voltage controlled oscillator that involves correcting for offset related to the feedback system |
-
2010
- 2010-07-26 CN CN2010102451708A patent/CN102347765B/zh active Active
-
2011
- 2011-04-18 EP EP11811753.0A patent/EP2515441B1/en active Active
- 2011-04-18 US US13/575,595 patent/US8624630B2/en active Active
- 2011-04-18 AU AU2011285387A patent/AU2011285387B2/en active Active
- 2011-04-18 WO PCT/CN2011/072954 patent/WO2012013051A1/zh active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5799048A (en) * | 1996-04-17 | 1998-08-25 | Sun Microsystems, Inc. | Phase detector for clock synchronization and recovery |
US7409027B1 (en) * | 2002-06-14 | 2008-08-05 | Cypress Semiconductor Corp. | System and method for recovering a clock using a reduced rate linear phase detector and voltage controlled oscillator |
CN101572527A (zh) * | 2009-06-09 | 2009-11-04 | 中国人民解放军国防科学技术大学 | 高速高抖动容限的随机数据线性鉴相器电路 |
Also Published As
Publication number | Publication date |
---|---|
US8624630B2 (en) | 2014-01-07 |
CN102347765A (zh) | 2012-02-08 |
WO2012013051A1 (zh) | 2012-02-02 |
EP2515441B1 (en) | 2017-11-22 |
EP2515441A1 (en) | 2012-10-24 |
AU2011285387A1 (en) | 2012-08-23 |
US20120293226A1 (en) | 2012-11-22 |
AU2011285387B2 (en) | 2013-09-19 |
EP2515441A4 (en) | 2015-01-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102347765B (zh) | 一种时钟与数据恢复系统、相位调整方法及鉴相器 | |
US10263761B2 (en) | Clock and data recovery having shared clock generator | |
CN104539285A (zh) | 数据时钟恢复电路 | |
US20030091139A1 (en) | System and method for adjusting phase offsets | |
US20030081709A1 (en) | Single-ended IO with dynamic synchronous deskewing architecture | |
US10523413B2 (en) | Non-transitory machine readable medium for clock recovery | |
US10277389B2 (en) | Phase detectors for clock and data recovery | |
CN102611440B (zh) | 基于门控振荡器的超高速突发模式时钟恢复电路 | |
CN103973300B (zh) | 鉴频鉴相器电路 | |
US8208596B2 (en) | System and method for implementing a dual-mode PLL to support a data transmission procedure | |
CN104065380A (zh) | 锁相环以及时钟和数据恢复电路 | |
CN102769455A (zh) | 高速输入输出接口及其接收电路 | |
US9112655B1 (en) | Clock data recovery circuitry with programmable clock phase selection | |
US8964880B2 (en) | Reduction in power supply induced jitter on a SerDes transmitter | |
Prete et al. | A 100mW 9.6 Gb/s transceiver in 90nm CMOS for next-generation memory interfaces | |
US20080116949A1 (en) | Wideband dual-loop data recovery DLL architecture | |
US6995618B1 (en) | VCO feedback loop to reduce phase noise | |
CN108988853B (zh) | 数字辅助锁定电路 | |
US8456205B2 (en) | Phase-frequency comparator and serial transmission device | |
CN108988854B (zh) | 锁相环电路 | |
Frans et al. | A 1-4 Gbps quad transceiver cell using PLL with gate-current leakage compensator in 90nm CMOS | |
US20080111599A1 (en) | Wideband dual-loop data recovery DLL architecture | |
CN115664414A (zh) | 一种时钟数据恢复电路、处理芯片、显示设备 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
REG | Reference to a national code |
Ref country code: HK Ref legal event code: DE Ref document number: 1164560 Country of ref document: HK |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
REG | Reference to a national code |
Ref country code: HK Ref legal event code: GR Ref document number: 1164560 Country of ref document: HK |
|
TR01 | Transfer of patent right |
Effective date of registration: 20221117 Address after: 518055 Zhongxing Industrial Park, Liuxian Avenue, Xili street, Nanshan District, Shenzhen City, Guangdong Province Patentee after: SANECHIPS TECHNOLOGY Co.,Ltd. Address before: 518057 Ministry of justice, Zhongxing building, South Science and technology road, Nanshan District hi tech Industrial Park, Shenzhen, Guangdong Patentee before: ZTE Corp. |
|
TR01 | Transfer of patent right |