DE4325518A1 - Verfahren zur Glättung der Kante von Halbleiterscheiben - Google Patents

Verfahren zur Glättung der Kante von Halbleiterscheiben

Info

Publication number
DE4325518A1
DE4325518A1 DE4325518A DE4325518A DE4325518A1 DE 4325518 A1 DE4325518 A1 DE 4325518A1 DE 4325518 A DE4325518 A DE 4325518A DE 4325518 A DE4325518 A DE 4325518A DE 4325518 A1 DE4325518 A1 DE 4325518A1
Authority
DE
Germany
Prior art keywords
edge
semiconductor wafer
smoothing
cloth
notch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE4325518A
Other languages
German (de)
English (en)
Inventor
Anton Dipl Ing Huber
Joachim Dipl Ing Junge
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siltronic AG
Original Assignee
Wacker Siltronic AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wacker Siltronic AG filed Critical Wacker Siltronic AG
Priority to DE4325518A priority Critical patent/DE4325518A1/de
Priority to MYPI94001563A priority patent/MY130149A/en
Priority to CN94107806A priority patent/CN1103511A/zh
Priority to TW083106329A priority patent/TW260812B/zh
Priority to JP6189009A priority patent/JPH0760624A/ja
Priority to KR1019940017541A priority patent/KR950004435A/ko
Priority to ITRM940495A priority patent/IT1272345B/it
Publication of DE4325518A1 publication Critical patent/DE4325518A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02021—Edge treatment, chamfering
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B9/00—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor
    • B24B9/02—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground
    • B24B9/06—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain
    • B24B9/065—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain of thin, brittle parts, e.g. semiconductors, wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02024—Mirror polishing

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Grinding And Polishing Of Tertiary Curved Surfaces And Surfaces With Complex Shapes (AREA)
DE4325518A 1993-07-29 1993-07-29 Verfahren zur Glättung der Kante von Halbleiterscheiben Withdrawn DE4325518A1 (de)

Priority Applications (7)

Application Number Priority Date Filing Date Title
DE4325518A DE4325518A1 (de) 1993-07-29 1993-07-29 Verfahren zur Glättung der Kante von Halbleiterscheiben
MYPI94001563A MY130149A (en) 1993-07-29 1994-06-16 Process for smoothing the edge of semiconductor wafers.
CN94107806A CN1103511A (zh) 1993-07-29 1994-06-30 精磨半导体晶片的边沿的方法
TW083106329A TW260812B (enrdf_load_stackoverflow) 1993-07-29 1994-07-12
JP6189009A JPH0760624A (ja) 1993-07-29 1994-07-20 半導体円板のエッジを研磨する方法
KR1019940017541A KR950004435A (ko) 1993-07-29 1994-07-20 반도체웨이퍼의 에지를 다듬질하는 방법
ITRM940495A IT1272345B (it) 1993-07-29 1994-07-27 "procedimento per la levigatura dello spigolo di fette di semiconduttori".

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4325518A DE4325518A1 (de) 1993-07-29 1993-07-29 Verfahren zur Glättung der Kante von Halbleiterscheiben

Publications (1)

Publication Number Publication Date
DE4325518A1 true DE4325518A1 (de) 1995-02-02

Family

ID=6494026

Family Applications (1)

Application Number Title Priority Date Filing Date
DE4325518A Withdrawn DE4325518A1 (de) 1993-07-29 1993-07-29 Verfahren zur Glättung der Kante von Halbleiterscheiben

Country Status (7)

Country Link
JP (1) JPH0760624A (enrdf_load_stackoverflow)
KR (1) KR950004435A (enrdf_load_stackoverflow)
CN (1) CN1103511A (enrdf_load_stackoverflow)
DE (1) DE4325518A1 (enrdf_load_stackoverflow)
IT (1) IT1272345B (enrdf_load_stackoverflow)
MY (1) MY130149A (enrdf_load_stackoverflow)
TW (1) TW260812B (enrdf_load_stackoverflow)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1004400A1 (en) * 1998-11-27 2000-05-31 SpeedFam- IPEC Co., Ltd. Method for polishing a notch of a wafer
EP1043120A1 (en) * 1999-03-31 2000-10-11 Nippei Toyama Corporation Method and apparatus for grinding a workpiece
EP0993907A4 (en) * 1998-02-27 2001-04-25 Speedfam Co Ltd DEVICE FOR POLISHING THE CIRCUMFERENCE OF A WORKPIECE
EP0950466A3 (en) * 1998-04-13 2003-03-05 Nippei Toyama Corporation Method for chamfering a wafer
DE10219450B4 (de) * 2001-05-02 2005-06-09 Speedfam Co., Ltd., Ayase Poliervorrichtung zum Polieren des Umfangs eines Wafers
DE10153813B4 (de) * 2000-11-07 2005-08-04 Speedfam Co., Ltd., Ayase Poliervorrichtung zum Polieren von äußeren Umfangsabschnitten eines plattenförmigen Werkstücks
DE102009030294A1 (de) * 2009-06-24 2011-01-05 Siltronic Ag Verfahren zur Politur der Kante einer Halbleiterscheibe
DE102013210057A1 (de) 2013-05-29 2014-12-04 Siltronic Ag Verfahren zur Politur der Kante einer Halbleiterscheibe

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3949941B2 (ja) * 2001-11-26 2007-07-25 株式会社東芝 半導体装置の製造方法および研磨装置
JP5112703B2 (ja) * 2007-01-18 2013-01-09 ダイトエレクトロン株式会社 ウェーハ面取り加工方法およびその装置
JP2011194561A (ja) * 2010-02-26 2011-10-06 Nakamura Tome Precision Ind Co Ltd 円盤状ワークの面取装置
CN102642253B (zh) * 2012-05-04 2014-12-10 上海华力微电子有限公司 一种硅片切边方法及其装置
JP6012719B2 (ja) 2012-05-07 2016-10-25 信越半導体株式会社 円板形ワーク用外周研磨装置
JP7562994B2 (ja) * 2020-06-08 2024-10-08 株式会社Sumco ウェーハ外周部の研磨装置
CN113182971B (zh) * 2021-05-12 2022-11-25 四川雅吉芯电子科技有限公司 一种单晶硅外延片高精度磨边装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4588473A (en) * 1982-09-28 1986-05-13 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor wafer process
US5128281A (en) * 1991-06-05 1992-07-07 Texas Instruments Incorporated Method for polishing semiconductor wafer edges
EP0515036A2 (en) * 1991-05-24 1992-11-25 Shin-Etsu Handotai Company Limited An apparatus for chamfering the peripheral edge of a wafer to specular finish
DE4120003A1 (de) * 1991-06-18 1992-12-24 Mueller Georg Nuernberg Vorrichtung und verfahren zum kantenverrunden von halbleiterronden
DE4138087A1 (de) * 1991-07-12 1993-05-27 Daito Shoji Co Ltd Verfahren zum schleifen der kanten eines scheibenfoermigen gekerbten werkstuecks

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57184662A (en) * 1981-05-09 1982-11-13 Hitachi Ltd Chamfering method and device of wafer

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4588473A (en) * 1982-09-28 1986-05-13 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor wafer process
EP0515036A2 (en) * 1991-05-24 1992-11-25 Shin-Etsu Handotai Company Limited An apparatus for chamfering the peripheral edge of a wafer to specular finish
US5128281A (en) * 1991-06-05 1992-07-07 Texas Instruments Incorporated Method for polishing semiconductor wafer edges
DE4120003A1 (de) * 1991-06-18 1992-12-24 Mueller Georg Nuernberg Vorrichtung und verfahren zum kantenverrunden von halbleiterronden
DE4138087A1 (de) * 1991-07-12 1993-05-27 Daito Shoji Co Ltd Verfahren zum schleifen der kanten eines scheibenfoermigen gekerbten werkstuecks

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
JP 4-57678 A2. In: Patent Abstracts of Japan, M-1261, Vol. 16, No. 248, 5.6.1992 *
JP 62-292367 A2. In: Patent Abstracts of Japan, M-702, 27.5.1988, Vol. 12, No. 182 *

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0993907A4 (en) * 1998-02-27 2001-04-25 Speedfam Co Ltd DEVICE FOR POLISHING THE CIRCUMFERENCE OF A WORKPIECE
EP0950466A3 (en) * 1998-04-13 2003-03-05 Nippei Toyama Corporation Method for chamfering a wafer
EP1004400A1 (en) * 1998-11-27 2000-05-31 SpeedFam- IPEC Co., Ltd. Method for polishing a notch of a wafer
EP1043120A1 (en) * 1999-03-31 2000-10-11 Nippei Toyama Corporation Method and apparatus for grinding a workpiece
SG91268A1 (en) * 1999-03-31 2002-09-17 Nippei Toyama Corp Method and apparatus for grinding a workpiece
DE10153813B4 (de) * 2000-11-07 2005-08-04 Speedfam Co., Ltd., Ayase Poliervorrichtung zum Polieren von äußeren Umfangsabschnitten eines plattenförmigen Werkstücks
DE10219450B4 (de) * 2001-05-02 2005-06-09 Speedfam Co., Ltd., Ayase Poliervorrichtung zum Polieren des Umfangs eines Wafers
DE102009030294A1 (de) * 2009-06-24 2011-01-05 Siltronic Ag Verfahren zur Politur der Kante einer Halbleiterscheibe
US8388411B2 (en) 2009-06-24 2013-03-05 Siltronic Ag Method for polishing the edge of a semiconductor wafer
DE102009030294B4 (de) * 2009-06-24 2013-04-25 Siltronic Ag Verfahren zur Politur der Kante einer Halbleiterscheibe
DE102013210057A1 (de) 2013-05-29 2014-12-04 Siltronic Ag Verfahren zur Politur der Kante einer Halbleiterscheibe

Also Published As

Publication number Publication date
ITRM940495A1 (it) 1996-01-27
CN1103511A (zh) 1995-06-07
TW260812B (enrdf_load_stackoverflow) 1995-10-21
MY130149A (en) 2007-06-29
ITRM940495A0 (it) 1994-07-27
KR950004435A (ko) 1995-02-18
JPH0760624A (ja) 1995-03-07
IT1272345B (it) 1997-06-16

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8127 New person/name/address of the applicant

Owner name: WACKER SILTRONIC GESELLSCHAFT FUER HALBLEITERMATER

8139 Disposal/non-payment of the annual fee