DE3911848A1 - Doppelrechneranlage - Google Patents

Doppelrechneranlage

Info

Publication number
DE3911848A1
DE3911848A1 DE3911848A DE3911848A DE3911848A1 DE 3911848 A1 DE3911848 A1 DE 3911848A1 DE 3911848 A DE3911848 A DE 3911848A DE 3911848 A DE3911848 A DE 3911848A DE 3911848 A1 DE3911848 A1 DE 3911848A1
Authority
DE
Germany
Prior art keywords
unit
signal
processor
control
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE3911848A
Other languages
German (de)
English (en)
Other versions
DE3911848C2 (nl
Inventor
Hajime Akai
Isao Domoto
Eiji Nakamoto
Yoshitugu Morioka
Shunsuke Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP63090752A external-priority patent/JPH0682283B2/ja
Priority claimed from JP63096171A external-priority patent/JPH01266634A/ja
Priority claimed from JP63096172A external-priority patent/JPH01266633A/ja
Priority claimed from JP63105064A external-priority patent/JPH0630070B2/ja
Priority claimed from JP63109955A external-priority patent/JPH0621994B2/ja
Application filed by Yokogawa Electric Corp filed Critical Yokogawa Electric Corp
Publication of DE3911848A1 publication Critical patent/DE3911848A1/de
Application granted granted Critical
Publication of DE3911848C2 publication Critical patent/DE3911848C2/de
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2097—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements maintaining the standby controller/processing unit updated
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023—Failover techniques
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2038—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant with a single idle spare processing component

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Software Systems (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
DE3911848A 1988-04-13 1989-04-11 Doppelrechneranlage Granted DE3911848A1 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP63090752A JPH0682283B2 (ja) 1988-04-13 1988-04-13 二重化プロセッサシステム
JP63096171A JPH01266634A (ja) 1988-04-19 1988-04-19 二重化制御システム
JP63096172A JPH01266633A (ja) 1988-04-19 1988-04-19 二重化制御システム
JP63105064A JPH0630070B2 (ja) 1988-04-27 1988-04-27 二重化制御システム
JP63109955A JPH0621994B2 (ja) 1988-05-06 1988-05-06 二重化制御システム

Publications (2)

Publication Number Publication Date
DE3911848A1 true DE3911848A1 (de) 1989-10-26
DE3911848C2 DE3911848C2 (nl) 1991-06-27

Family

ID=27525498

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3911848A Granted DE3911848A1 (de) 1988-04-13 1989-04-11 Doppelrechneranlage

Country Status (6)

Country Link
KR (1) KR920003453B1 (nl)
CN (1) CN1041466C (nl)
BR (1) BR8901738A (nl)
DE (1) DE3911848A1 (nl)
GB (3) GB2217487B (nl)
NL (1) NL8900635A (nl)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT398645B (de) * 1991-11-04 1995-01-25 Alcatel Austria Ag Rechnersystem

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970002628A (ko) * 1995-06-30 1997-01-28 무정지화 시스템제어장치 및 이를 이용한 시스템제어방법
US6311289B1 (en) 1998-11-03 2001-10-30 Telefonaktiebolaget Lm Ericsson (Publ) Explicit state copy in a fault tolerant system using a remote write operation
CN100419627C (zh) * 2001-09-28 2008-09-17 技嘉科技股份有限公司 具有备用核心单元的主机板及激活该备用核心单元的方法
CN110745085A (zh) * 2019-10-30 2020-02-04 英业达科技有限公司 一种车用计算机系统

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3303474A (en) * 1963-01-17 1967-02-07 Rca Corp Duplexing system for controlling online and standby conditions of two computers
US3503048A (en) * 1966-03-25 1970-03-24 Ericsson Telefon Ab L M Arrangement in computers for controlling a plant consisting of a plurality of cooperating means
US3562716A (en) * 1967-01-24 1971-02-09 Int Standard Electric Corp Data processing system
US3864670A (en) * 1970-09-30 1975-02-04 Yokogawa Electric Works Ltd Dual computer system with signal exchange system
US4466098A (en) * 1982-06-11 1984-08-14 Siemens Corporation Cross channel circuit for an electronic system having two or more redundant computers

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1412246A (en) * 1971-09-29 1975-10-29 Kent Automation Systems Ltd Computer control arrangements
DE2407241A1 (de) * 1974-02-15 1975-08-21 Ibm Deutschland Verfahren und anordnung zur erhoehung der verfuegbarkeit eines digitalrechners
FR2319264A1 (fr) * 1975-07-22 1977-02-18 Labo Cent Telecommunicat Systeme de commande perfectionne d'un equipement de commutation
FR2392569A2 (fr) * 1977-05-27 1978-12-22 Labo Cent Telecommunicat Systeme de commande perfectionne d'un equipement de commutation
DE2741379A1 (de) * 1977-09-14 1979-03-15 Siemens Ag Rechnersystem
JPS5537641A (en) * 1978-09-08 1980-03-15 Fujitsu Ltd Synchronization system for doubled processor
DE3235762A1 (de) * 1982-09-28 1984-03-29 Fried. Krupp Gmbh, 4300 Essen Verfahren und vorrichtung zur synchronisation von datenverarbeitungsanlagen
US4610013A (en) * 1983-11-08 1986-09-02 Avco Corporation Remote multiplexer terminal with redundant central processor units
US4823256A (en) * 1984-06-22 1989-04-18 American Telephone And Telegraph Company, At&T Bell Laboratories Reconfigurable dual processor system
SE454730B (sv) * 1986-09-19 1988-05-24 Asea Ab Forfarande och datorutrustning for stotfri omkoppling av funktionen fran aktiva enheter till beredskapsenheter i en centralenhet
US4797884A (en) * 1986-09-29 1989-01-10 Texas Instruments Incorporated Redundant device control unit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3303474A (en) * 1963-01-17 1967-02-07 Rca Corp Duplexing system for controlling online and standby conditions of two computers
US3503048A (en) * 1966-03-25 1970-03-24 Ericsson Telefon Ab L M Arrangement in computers for controlling a plant consisting of a plurality of cooperating means
US3562716A (en) * 1967-01-24 1971-02-09 Int Standard Electric Corp Data processing system
US3864670A (en) * 1970-09-30 1975-02-04 Yokogawa Electric Works Ltd Dual computer system with signal exchange system
US4466098A (en) * 1982-06-11 1984-08-14 Siemens Corporation Cross channel circuit for an electronic system having two or more redundant computers

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT398645B (de) * 1991-11-04 1995-01-25 Alcatel Austria Ag Rechnersystem

Also Published As

Publication number Publication date
GB2251966B (en) 1992-10-14
GB2217487B (en) 1992-09-23
CN1041466C (zh) 1998-12-30
DE3911848C2 (nl) 1991-06-27
GB2251967A (en) 1992-07-22
GB2251967B (en) 1992-10-14
KR920003453B1 (ko) 1992-05-01
KR890016466A (ko) 1989-11-29
BR8901738A (pt) 1989-11-21
GB8904779D0 (en) 1989-04-12
GB9204278D0 (en) 1992-04-08
GB9204279D0 (en) 1992-04-08
GB2217487A (en) 1989-10-25
GB2251966A (en) 1992-07-22
CN1037417A (zh) 1989-11-22
NL8900635A (nl) 1989-11-01

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee