DE3832641C2 - - Google Patents

Info

Publication number
DE3832641C2
DE3832641C2 DE3832641A DE3832641A DE3832641C2 DE 3832641 C2 DE3832641 C2 DE 3832641C2 DE 3832641 A DE3832641 A DE 3832641A DE 3832641 A DE3832641 A DE 3832641A DE 3832641 C2 DE3832641 C2 DE 3832641C2
Authority
DE
Germany
Prior art keywords
semiconductor
memory device
forming
layers
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3832641A
Other languages
German (de)
English (en)
Other versions
DE3832641A1 (de
Inventor
Kenji Kohda
Tsuyoshi Toyama
Nobuaki Andoh
Kenji Noguchi
Shinichi Itami Hyogo Jp Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE3832641A1 publication Critical patent/DE3832641A1/de
Application granted granted Critical
Publication of DE3832641C2 publication Critical patent/DE3832641C2/de
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/684—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/685—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection from the channel
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
DE3832641A 1987-10-21 1988-09-26 Halbleiterspeichereinrichtung und herstellungsverfahren Granted DE3832641A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62267183A JPH0712063B2 (ja) 1987-10-21 1987-10-21 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
DE3832641A1 DE3832641A1 (de) 1989-05-03
DE3832641C2 true DE3832641C2 (https=) 1990-12-06

Family

ID=17441263

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3832641A Granted DE3832641A1 (de) 1987-10-21 1988-09-26 Halbleiterspeichereinrichtung und herstellungsverfahren

Country Status (3)

Country Link
US (1) US5107313A (https=)
JP (1) JPH0712063B2 (https=)
DE (1) DE3832641A1 (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5336628A (en) * 1988-10-25 1994-08-09 Commissariat A L'energie Atomique Method for fabricating semiconductor memory device
US5070032A (en) * 1989-03-15 1991-12-03 Sundisk Corporation Method of making dense flash eeprom semiconductor memory structures
DE4132140A1 (de) * 1991-09-26 1993-04-08 Siemens Ag Verfahren zur herstellung einer selbstjustierten kontaktlochanordnung und selbstjustierte kontaktlochanordnung
US5385752A (en) * 1993-10-14 1995-01-31 Steele; Wesley M. Method and apparatus for coating interior surfaces
WO1996008840A1 (en) * 1994-09-13 1996-03-21 Macronix International Co., Ltd. A flash eprom transistor array and method for manufacturing the same
US5658814A (en) * 1996-07-09 1997-08-19 Micron Technology, Inc. Method of forming a line of high density floating gate transistors
US6329245B1 (en) 1999-12-20 2001-12-11 Chartered Semiconductor Manufacturing Ltd. Flash memory array structure with reduced bit-line pitch
DE10219343A1 (de) * 2002-04-30 2003-11-20 Infineon Technologies Ag NROM-Speicherzelle
JP2004281966A (ja) * 2003-03-19 2004-10-07 Ricoh Co Ltd 半導体装置及び半導体装置の製造方法
US20210020630A1 (en) * 2019-04-15 2021-01-21 Nexchip Semiconductor Co., Ltd. High-voltage tolerant semiconductor element

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5857750A (ja) * 1981-10-01 1983-04-06 Seiko Instr & Electronics Ltd 不揮発性半導体メモリ
JP2515715B2 (ja) * 1984-02-24 1996-07-10 株式会社日立製作所 半導体集積回路装置の製造方法

Also Published As

Publication number Publication date
DE3832641A1 (de) 1989-05-03
JPH0712063B2 (ja) 1995-02-08
US5107313A (en) 1992-04-21
JPH01108777A (ja) 1989-04-26

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee