DE3789369T2 - Verfahren zur Herstellung einer keramischen Schaltungsplatte. - Google Patents

Verfahren zur Herstellung einer keramischen Schaltungsplatte.

Info

Publication number
DE3789369T2
DE3789369T2 DE3789369T DE3789369T DE3789369T2 DE 3789369 T2 DE3789369 T2 DE 3789369T2 DE 3789369 T DE3789369 T DE 3789369T DE 3789369 T DE3789369 T DE 3789369T DE 3789369 T2 DE3789369 T2 DE 3789369T2
Authority
DE
Germany
Prior art keywords
manufacturing
circuit board
ceramic circuit
ceramic
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3789369T
Other languages
English (en)
Other versions
DE3789369D1 (de
Inventor
Hitoshi Suzuki
Hiromitsu Yokoyama
Mineharu Tsukada
Hiromi Ogawa
Nobuo Kamehara
Koichi Niwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3789369D1 publication Critical patent/DE3789369D1/de
Publication of DE3789369T2 publication Critical patent/DE3789369T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01BCABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H01B1/14Conductive material dispersed in non-conductive inorganic material
    • H01B1/16Conductive material dispersed in non-conductive inorganic material the conductive material comprising metals or alloys
DE3789369T 1986-12-17 1987-12-17 Verfahren zur Herstellung einer keramischen Schaltungsplatte. Expired - Fee Related DE3789369T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29888986 1986-12-17

Publications (2)

Publication Number Publication Date
DE3789369D1 DE3789369D1 (de) 1994-04-21
DE3789369T2 true DE3789369T2 (de) 1994-06-23

Family

ID=17865474

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3789369T Expired - Fee Related DE3789369T2 (de) 1986-12-17 1987-12-17 Verfahren zur Herstellung einer keramischen Schaltungsplatte.

Country Status (7)

Country Link
US (1) US5015314A (de)
EP (1) EP0272129B1 (de)
JP (1) JPS63271995A (de)
KR (1) KR900005895B1 (de)
AU (1) AU584533B2 (de)
CA (1) CA1273853A (de)
DE (1) DE3789369T2 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02152105A (ja) * 1988-12-01 1990-06-12 Fujitsu Ltd 導電材料およびその製造方法
US4953273A (en) * 1989-05-25 1990-09-04 American Technical Ceramics Corporation Process for applying conductive terminations to ceramic components
WO1991004650A1 (en) * 1989-09-19 1991-04-04 Fujitsu Limited Via-forming ceramics composition
JP2584911B2 (ja) * 1991-06-18 1997-02-26 富士通株式会社 ガラス−セラミック多層回路基板の製造方法
US5925443A (en) * 1991-09-10 1999-07-20 International Business Machines Corporation Copper-based paste containing copper aluminate for microstructural and shrinkage control of copper-filled vias
US5372749A (en) * 1992-02-19 1994-12-13 Beijing Technology Of Printing Research Institute Chinese Method for surface treating conductive copper powder with a treating agent and coupler
DE4227085A1 (de) * 1992-08-17 1994-02-24 Bosch Gmbh Robert Verfahren zur Herstellung fein strukturierter elektrisch leitfähiger Schichten
JP3015621B2 (ja) * 1993-05-10 2000-03-06 松下電器産業株式会社 導体ペ−スト組成物
JPH07142822A (ja) * 1993-09-20 1995-06-02 Fujitsu Ltd 回路基板及びその製造方法
US5662755A (en) * 1993-10-15 1997-09-02 Matsushita Electric Industrial Co., Ltd. Method of making multi-layered ceramic substrates
US5716481A (en) * 1994-10-31 1998-02-10 Tdk Corporation Manufacturing method and manufacturing apparatus for ceramic electronic components
US6376054B1 (en) * 1999-02-10 2002-04-23 International Business Machines Corporation Surface metallization structure for multiple chip test and burn-in
KR100497824B1 (ko) * 2002-07-19 2005-07-01 상 추엔 웨이팅 머신 컴패니 리미티드 단련된 유리회로보드의 제조방법
WO2016167355A1 (ja) * 2015-04-17 2016-10-20 株式会社村田製作所 セラミック配線基板およびセラミック配線基板の製造方法
JP2019041022A (ja) * 2017-08-25 2019-03-14 日本特殊陶業株式会社 配線基板の製造方法及び導電ペースト
CN110248465B (zh) * 2019-06-20 2024-03-19 上海铠琪科技有限公司 一种厚膜和覆铜一体陶瓷电路板及其制备方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2981367A (en) * 1967-11-14 1969-05-22 Joseph Lucas (Industries) Limited Methods of preparing articles comprising ceramic bodies with electrical circuits thereon
JPS6058268B2 (ja) * 1981-10-29 1985-12-19 藤倉化成株式会社 導電性銅ペ−スト組成物
JPS59995A (ja) * 1982-06-16 1984-01-06 富士通株式会社 銅導体多層構造体の製造方法
US4503090A (en) * 1983-02-23 1985-03-05 At&T Bell Laboratories Thick film resistor circuits
JPS59155988A (ja) * 1983-02-25 1984-09-05 住友金属鉱山株式会社 厚膜導電ペ−ストの製造方法
US4594181A (en) * 1984-09-17 1986-06-10 E. I. Du Pont De Nemours And Company Metal oxide-coated copper powder
US4599277A (en) * 1984-10-09 1986-07-08 International Business Machines Corp. Control of the sintering of powdered metals
JPS61155243A (ja) * 1984-12-28 1986-07-14 富士通株式会社 グリ−ンシ−ト組成物
US4772346A (en) * 1986-02-14 1988-09-20 International Business Machines Corporation Method of bonding inorganic particulate material

Also Published As

Publication number Publication date
KR900005895B1 (ko) 1990-08-13
EP0272129A3 (en) 1990-01-31
KR880008724A (ko) 1988-08-31
DE3789369D1 (de) 1994-04-21
EP0272129B1 (de) 1994-03-16
CA1273853C (en) 1990-09-11
JPS63271995A (ja) 1988-11-09
CA1273853A (en) 1990-09-11
JPH0563110B2 (de) 1993-09-09
US5015314A (en) 1991-05-14
AU584533B2 (en) 1989-05-25
AU8254887A (en) 1988-06-23
EP0272129A2 (de) 1988-06-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee