DE3777466D1 - Verfahren zum bedecken einer anordnung mit einer ersten schicht aus siliconnitrid und mit einer zweiten schicht aus einem polyimid und eine nach diesem verfahren bedeckte anordnung. - Google Patents
Verfahren zum bedecken einer anordnung mit einer ersten schicht aus siliconnitrid und mit einer zweiten schicht aus einem polyimid und eine nach diesem verfahren bedeckte anordnung.Info
- Publication number
- DE3777466D1 DE3777466D1 DE8787200672T DE3777466T DE3777466D1 DE 3777466 D1 DE3777466 D1 DE 3777466D1 DE 8787200672 T DE8787200672 T DE 8787200672T DE 3777466 T DE3777466 T DE 3777466T DE 3777466 D1 DE3777466 D1 DE 3777466D1
- Authority
- DE
- Germany
- Prior art keywords
- layer
- arrangement
- polyimide
- covering
- silicon nitride
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004642 Polyimide Substances 0.000 title 1
- 229910052581 Si3N4 Inorganic materials 0.000 title 1
- 229920001721 polyimide Polymers 0.000 title 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02304—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02345—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light
- H01L21/02348—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light treatment by exposure to UV light
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL8601041A NL8601041A (nl) | 1986-04-23 | 1986-04-23 | Werkwijze voor het vervaardigen van een inrichting en inrichting vervaardigd met de werkwijze. |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3777466D1 true DE3777466D1 (de) | 1992-04-23 |
Family
ID=19847925
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8787200672T Expired - Lifetime DE3777466D1 (de) | 1986-04-23 | 1987-04-09 | Verfahren zum bedecken einer anordnung mit einer ersten schicht aus siliconnitrid und mit einer zweiten schicht aus einem polyimid und eine nach diesem verfahren bedeckte anordnung. |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0251347B1 (de) |
JP (1) | JP2529685B2 (de) |
DE (1) | DE3777466D1 (de) |
NL (1) | NL8601041A (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000043439A1 (fr) * | 1999-01-21 | 2000-07-27 | Asahi Kasei Kabushiki Kaisha | Ester d'acide polyamique |
US6350397B1 (en) | 1999-03-10 | 2002-02-26 | Aspen Research Corporation | Optical member with layer having a coating geometry and composition that enhance cleaning properties |
JP2001284499A (ja) * | 2000-03-09 | 2001-10-12 | Lucent Technol Inc | 半導体デバイスとその製造方法 |
US20040150096A1 (en) | 2003-02-03 | 2004-08-05 | International Business Machines Corporation | Capping coating for 3D integration applications |
US7850836B2 (en) * | 2005-11-09 | 2010-12-14 | Nanyang Technological University | Method of electro-depositing a conductive material in at least one through-hole via of a semiconductor substrate |
JP5920353B2 (ja) * | 2011-09-27 | 2016-05-18 | 日立化成株式会社 | 窒化ホウ素物粒子、エポキシ樹脂組成物、半硬化樹脂組成物、硬化樹脂組成物、樹脂シート、発熱性電子部品及び窒化ホウ素粒子の製造方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2541624C2 (de) * | 1975-09-18 | 1982-09-16 | Ibm Deutschland Gmbh, 7000 Stuttgart | Wässrige Ätzlösung und Verfahren zum Ätzen von Polymerfilmen oder Folien auf Polyimidbasis |
US4330569A (en) * | 1979-05-25 | 1982-05-18 | Ncr Corporation | Method for conditioning nitride surface |
US4329419A (en) * | 1980-09-03 | 1982-05-11 | E. I. Du Pont De Nemours And Company | Polymeric heat resistant photopolymerizable composition for semiconductors and capacitors |
NL8203980A (nl) * | 1982-10-15 | 1984-05-01 | Philips Nv | Werkwijze voor de fotolithografische behandeling van een substraat. |
-
1986
- 1986-04-23 NL NL8601041A patent/NL8601041A/nl not_active Application Discontinuation
-
1987
- 1987-04-09 DE DE8787200672T patent/DE3777466D1/de not_active Expired - Lifetime
- 1987-04-09 EP EP87200672A patent/EP0251347B1/de not_active Expired - Lifetime
- 1987-04-20 JP JP62095478A patent/JP2529685B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0251347A1 (de) | 1988-01-07 |
NL8601041A (nl) | 1987-11-16 |
JPS62254431A (ja) | 1987-11-06 |
EP0251347B1 (de) | 1992-03-18 |
JP2529685B2 (ja) | 1996-08-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N |
|
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |