DE3751188D1 - NRZ-Phasenregelschleifenschaltung mit Monitor und Erholschaltungen dafür. - Google Patents

NRZ-Phasenregelschleifenschaltung mit Monitor und Erholschaltungen dafür.

Info

Publication number
DE3751188D1
DE3751188D1 DE3751188T DE3751188T DE3751188D1 DE 3751188 D1 DE3751188 D1 DE 3751188D1 DE 3751188 T DE3751188 T DE 3751188T DE 3751188 T DE3751188 T DE 3751188T DE 3751188 D1 DE3751188 D1 DE 3751188D1
Authority
DE
Germany
Prior art keywords
monitor
locked loop
loop circuit
recovery circuits
circuits therefor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3751188T
Other languages
English (en)
Other versions
DE3751188T2 (de
Inventor
Reymond Paul Rizzo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE3751188D1 publication Critical patent/DE3751188D1/de
Application granted granted Critical
Publication of DE3751188T2 publication Critical patent/DE3751188T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/113Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S331/00Oscillators
    • Y10S331/02Phase locked loop having lock indicating or detecting means
DE3751188T 1987-02-11 1987-12-01 NRZ-Phasenregelschleifenschaltung mit Monitor und Erholschaltungen dafür. Expired - Fee Related DE3751188T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/013,598 US4787097A (en) 1987-02-11 1987-02-11 NRZ phase-locked loop circuit with associated monitor and recovery circuitry

Publications (2)

Publication Number Publication Date
DE3751188D1 true DE3751188D1 (de) 1995-04-27
DE3751188T2 DE3751188T2 (de) 1995-09-28

Family

ID=21760761

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3751188T Expired - Fee Related DE3751188T2 (de) 1987-02-11 1987-12-01 NRZ-Phasenregelschleifenschaltung mit Monitor und Erholschaltungen dafür.

Country Status (4)

Country Link
US (1) US4787097A (de)
EP (1) EP0278079B1 (de)
JP (1) JPH0824261B2 (de)
DE (1) DE3751188T2 (de)

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FR2635623B1 (fr) * 1988-08-19 1990-11-09 Philips Nv Dispositif de synchronisation sur des paquets de donnees numeriques et lecteur le comprenant
JPH0282835A (ja) * 1988-09-20 1990-03-23 Sony Corp ディジタル信号受信装置
EP0380946B1 (de) * 1989-01-31 1994-09-14 Siemens Aktiengesellschaft Verfahren zur Überwachung der Regelfähigkeit eines Phasenregelkreises
US4933959A (en) * 1989-05-08 1990-06-12 Datatape Incorporated Tracking bit synchronizer
IT1231650B (it) * 1989-07-21 1991-12-18 Selenia Ind Elettroniche Circuito per la ricostruzione del clock da un messaggio da utilizzare in sistemi di trasmissione dati
US4949051A (en) * 1989-09-01 1990-08-14 General Electric Company Phase lock clock recovery with aided frequency aquisition
JP2864143B2 (ja) * 1990-03-20 1999-03-03 富士通株式会社 信号検出回路
JP2938562B2 (ja) * 1990-11-28 1999-08-23 株式会社日立製作所 位相同期回路ic
US5195110A (en) * 1991-04-01 1993-03-16 Nec America, Inc. Clock recovery and decoder circuit for a CMI-encoded signal
US5256989A (en) * 1991-05-03 1993-10-26 Motorola, Inc. Lock detection for a phase lock loop
US5319680A (en) * 1991-09-03 1994-06-07 The Whitaker Corporation Phase locked loop synchronization system for use in data communications
US5220293A (en) * 1991-12-19 1993-06-15 Sun Microsystems, Inc. High reliability phase-locked loop
AU674322B2 (en) * 1992-06-02 1996-12-19 Telefonaktiebolaget Lm Ericsson (Publ) Clock extraction circuit for fiber optical receivers
JPH06112817A (ja) * 1992-09-25 1994-04-22 Fujitsu Ltd Pll 周波数シンセサイザ回路
JPH06152581A (ja) * 1992-11-10 1994-05-31 Fujitsu Ltd クロック供給装置
US5479456A (en) * 1993-05-19 1995-12-26 U.S. Philips Corporation Automatic false synchronization correction mechanism for biphase-modulated signal reception
US5436598A (en) * 1994-01-21 1995-07-25 Calcomp Inc. Phase lock loop circuit for signals periodically inverting in phase
JP3358335B2 (ja) * 1994-11-04 2002-12-16 富士通株式会社 クロック信号再生回路及び電圧制御発振器の負荷容量制御回路
AUPM972594A0 (en) * 1994-11-28 1994-12-22 Curtin University Of Technology Steered frequency phase locked loop
KR970003097B1 (ko) * 1994-12-02 1997-03-14 양승택 다단 제어구조를 갖는 고속 비트동기 장치
IT1279165B1 (it) * 1995-03-14 1997-12-04 Cselt Centro Studi Lab Telecom Circuito per l'estrazione del segnale di orologio da un flusso dati ad alta velocita'.
US5801867A (en) * 1996-03-20 1998-09-01 Ericsson Raynet DC-coupled receiver for shared optical system
KR100224577B1 (ko) * 1996-10-07 1999-10-15 윤종용 위상동기루프의 록 검출장치
US5949261A (en) * 1996-12-17 1999-09-07 Cypress Semiconductor Corp. Method and circuit for reducing power and/or current consumption
US6577695B1 (en) * 1997-03-04 2003-06-10 Level One Communications Emulating narrow band phase-locked loop behavior on a wide band phase-locked loop
US5923191A (en) * 1997-05-08 1999-07-13 Vlsi Technology, Inc. Device and a method for monitoring a system clock signal
SE510713C2 (sv) 1997-10-10 1999-06-14 Ericsson Telefon Ab L M Faslåsningskrets samt metod för reglering av spänningsstyrd oscillator
EP1046229B1 (de) 1998-10-22 2005-04-06 Koninklijke Philips Electronics N.V. Frequenzsynthetisierer
US6177843B1 (en) * 1999-05-26 2001-01-23 Cypress Semiconductor Corp. Oscillator circuit controlled by programmable logic
US6794946B2 (en) * 2000-05-22 2004-09-21 Ramin Farjad-Rad Frequency acquisition for data recovery loops
US6392495B1 (en) * 2000-06-15 2002-05-21 Agere Systems Guardian Corp. Frequency detector circuits and systems
JP2002026728A (ja) * 2000-07-11 2002-01-25 Fujitsu Ltd Pll回路のモード制御回路及び半導体装置
DE60217670D1 (de) * 2001-05-03 2007-03-08 Coreoptics Inc Taktwiedergewinnungsschaltung
US6768362B1 (en) 2001-08-13 2004-07-27 Cypress Semiconductor Corp. Fail-safe zero delay buffer with automatic internal reference
US20030190001A1 (en) * 2002-04-08 2003-10-09 Exar Corporation Clock and data recovery circuit for return-to-zero data
US7173995B2 (en) * 2002-12-23 2007-02-06 Avago Technologies General Ip (Singapore) Pte. Ltd. Systems and methods for correcting gain error due to transition density variation in clock recovery systems
US7317778B2 (en) * 2003-01-31 2008-01-08 Hewlett-Packard Development Company, L.P. Phase-locked loop control circuit
US7436882B2 (en) * 2003-12-19 2008-10-14 Broadcom Corporation Decision feedback equalizer and clock and data recovery circuit for high speed applications
US7822113B2 (en) * 2003-12-19 2010-10-26 Broadcom Corporation Integrated decision feedback equalizer and clock and data recovery
US8094562B1 (en) * 2004-06-24 2012-01-10 Cypress Semiconductor Corporation Transmission of a continuous datastream through a re-clocked frame-based transport network
JP4657678B2 (ja) * 2004-10-28 2011-03-23 富士通株式会社 位相同期発振器
US7439816B1 (en) 2005-09-28 2008-10-21 Cypress Semiconductor Corporation Phase-locked loop fast lock circuit and method
US7420428B2 (en) 2006-07-13 2008-09-02 Itt Manufacturing Enterprises, Inc. Low noise phase locked loop with a high precision lock detector
US7719329B1 (en) 2007-06-15 2010-05-18 Cypress Semiconductor Corporation Phase-locked loop fast lock circuit and method
JP5006417B2 (ja) * 2010-01-28 2012-08-22 日本電波工業株式会社 Pll発振回路
JP2013070254A (ja) * 2011-09-22 2013-04-18 Toshiba Corp Cdr回路
EP3514951B1 (de) * 2018-01-18 2024-03-13 ams AG Oszillatorschaltungsanordnung

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US3723888A (en) * 1971-06-14 1973-03-27 Lorain Prod Corp Phase responsive control circuit
US4088832A (en) * 1976-10-12 1978-05-09 Motorola, Inc. Split phase code synchronizer and demodulator
US4191976A (en) * 1978-09-26 1980-03-04 Data General Corporation Circuit indicating phase relationship
US4301537A (en) * 1979-11-06 1981-11-17 Bunker Ramo Corporation Means and method for maintaining synchronization of a spread spectrum or other receiver clock
US4404530A (en) * 1980-10-22 1983-09-13 Data General Corporation Phase locked loop with compensation for loop phase errors
US4365211A (en) * 1980-10-31 1982-12-21 Westinghouse Electric Corp. Phase-locked loop with initialization loop
JPS5838035A (ja) * 1981-08-28 1983-03-05 Toshiba Corp ロツクはずれ検出回路
JPS5850827A (ja) * 1981-09-08 1983-03-25 Fujitsu Ltd フェーズ・ロック・ループ回路
US4466108A (en) * 1981-10-06 1984-08-14 Communications Satellite Corporation TDMA/PSK Carrier synchronization without preamble
US4484152A (en) * 1982-05-19 1984-11-20 Westinghouse Electric Corp. Phase-locked loop having improved locking capabilities
GB2143385A (en) * 1983-07-13 1985-02-06 Plessey Co Plc Phase lock loop circuit
US4590602A (en) * 1983-08-18 1986-05-20 General Signal Wide range clock recovery circuit
US4562411A (en) * 1983-12-29 1985-12-31 Rca Corporation Prepositioning circuit for phase lock loop
US4633488A (en) * 1984-11-13 1986-12-30 Digital Equipment Corporation Phase-locked loop for MFM data recording
US4593254A (en) * 1984-12-14 1986-06-03 International Business Machines Corp. VCO centering circuit
US4636748A (en) * 1985-06-26 1987-01-13 Data General Corporation Charge pump for use in a phase-locked loop

Also Published As

Publication number Publication date
EP0278079A2 (de) 1988-08-17
US4787097A (en) 1988-11-22
JPH0824261B2 (ja) 1996-03-06
JPS63204920A (ja) 1988-08-24
DE3751188T2 (de) 1995-09-28
EP0278079B1 (de) 1995-03-22
EP0278079A3 (en) 1989-12-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee