DE3676259D1 - Geschuetzte mos-transistorschaltung. - Google Patents

Geschuetzte mos-transistorschaltung.

Info

Publication number
DE3676259D1
DE3676259D1 DE8686113189T DE3676259T DE3676259D1 DE 3676259 D1 DE3676259 D1 DE 3676259D1 DE 8686113189 T DE8686113189 T DE 8686113189T DE 3676259 T DE3676259 T DE 3676259T DE 3676259 D1 DE3676259 D1 DE 3676259D1
Authority
DE
Germany
Prior art keywords
mos transistor
transistor circuit
protected mos
protected
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686113189T
Other languages
German (de)
English (en)
Inventor
Youichi Patent Division Suzuki
Makoto Patent Division Segawa
Shoji Patent Division Ariizumi
Takeo Patent Division Kondo
Fujio Patent Division Masuoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3676259D1 publication Critical patent/DE3676259D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/212—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only capacitors
    • H10D84/217—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only capacitors of only conductor-insulator-semiconductor capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/87—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of PN-junction gate FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/416—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials of highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers
DE8686113189T 1985-09-25 1986-09-25 Geschuetzte mos-transistorschaltung. Expired - Lifetime DE3676259D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60211419A JPS6271275A (ja) 1985-09-25 1985-09-25 半導体集積回路

Publications (1)

Publication Number Publication Date
DE3676259D1 true DE3676259D1 (de) 1991-01-31

Family

ID=16605642

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686113189T Expired - Lifetime DE3676259D1 (de) 1985-09-25 1986-09-25 Geschuetzte mos-transistorschaltung.

Country Status (5)

Country Link
US (1) US4893159A (enExample)
EP (1) EP0215493B1 (enExample)
JP (1) JPS6271275A (enExample)
KR (1) KR910003834B1 (enExample)
DE (1) DE3676259D1 (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3714647C2 (de) * 1987-05-02 1993-10-07 Telefunken Microelectron Integrierte Schaltungsanordnung
JPH081956B2 (ja) * 1987-11-06 1996-01-10 日産自動車株式会社 保護機能を備えた縦型ｍｏｓｆｅｔ
US5268587A (en) * 1989-03-20 1993-12-07 Hitachi, Ltd. Semiconductor integrated circuit device including a dielectric breakdown prevention circuit
US5227327A (en) * 1989-11-10 1993-07-13 Seiko Epson Corporation Method for making high impedance pull-up and pull-down input protection resistors for active integrated circuits
US5121179A (en) * 1990-10-08 1992-06-09 Seiko Epson Corporation Higher impedance pull-up and pull-down input protection resistors for MIS transistor integrated circuits
US5023672A (en) * 1989-11-15 1991-06-11 Ford Microelectronics Electrostatic discharge protection device for gallium arsenide resident integrated circuits
US5103169A (en) * 1989-11-15 1992-04-07 Texas Instruments Incorporated Relayless interconnections in high performance signal paths
US5113236A (en) * 1990-12-14 1992-05-12 North American Philips Corporation Integrated circuit device particularly adapted for high voltage applications
KR950007572B1 (ko) * 1992-03-31 1995-07-12 삼성전자주식회사 Esd 보호장치
US5432369A (en) * 1992-10-29 1995-07-11 Oki Electric Industry Co., Ltd. Input/output protection circuit
ATE164702T1 (de) * 1993-05-04 1998-04-15 Siemens Ag Integrierte halbleiterschaltung mit einem schutzmittel
JPH07106555A (ja) * 1993-10-01 1995-04-21 Mitsubishi Electric Corp 入力保護回路
JPH0837284A (ja) * 1994-07-21 1996-02-06 Nippondenso Co Ltd 半導体集積回路装置
DE69521041T2 (de) * 1995-08-02 2001-11-22 Stmicroelectronics S.R.L., Agrate Brianza Flash-EEPROM mit integrierter Anordnung zur Begrenzung der Löschung der Source-Spannung
JP3717227B2 (ja) * 1996-03-29 2005-11-16 株式会社ルネサステクノロジ 入力／出力保護回路
JPH11251594A (ja) * 1997-12-31 1999-09-17 Siliconix Inc 電圧クランプされたゲ―トを有するパワ―ｍｏｓｆｅｔ
US20020060343A1 (en) * 1999-03-19 2002-05-23 Robert J. Gauthier Diffusion resistor/capacitor (drc) non-aligned mosfet structure
KR101493035B1 (ko) * 2014-07-24 2015-02-17 주식회사 우심시스템 사용자가 스스로 잉크 충전 가능한 잉크젯 프린터용 잉크 카트리지
US11579645B2 (en) * 2019-06-21 2023-02-14 Wolfspeed, Inc. Device design for short-circuitry protection circuitry within transistors

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54101283A (en) * 1978-01-27 1979-08-09 Hitachi Ltd Gate protective device
JPS54140480A (en) * 1978-04-24 1979-10-31 Hitachi Ltd Semiconductor device
JPS5572081A (en) * 1978-11-27 1980-05-30 Fujitsu Ltd Input clamping circuit
JPS5635470A (en) * 1979-08-30 1981-04-08 Nec Corp Semiconductor device
JPS5683964A (en) * 1979-12-13 1981-07-08 Nec Corp Input protective device
JPS577969A (en) * 1980-06-18 1982-01-16 Toshiba Corp Semiconductor integrated circuit
JPS5745975A (en) * 1980-09-02 1982-03-16 Nec Corp Input protecting device for semiconductor device
JPS57109375A (en) * 1980-12-26 1982-07-07 Fujitsu Ltd Mis type transistor protection circuit
JPS57190359A (en) * 1981-05-19 1982-11-22 Toshiba Corp Protecting device for semiconductor
JPS57190360A (en) * 1981-05-19 1982-11-22 Toshiba Corp Protecting device for semiconductor
US4527213A (en) * 1981-11-27 1985-07-02 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor integrated circuit device with circuits for protecting an input section against an external surge
JPH061833B2 (ja) * 1982-11-11 1994-01-05 株式会社東芝 Ｍｏｓ形半導体装置
JPS59224163A (ja) * 1983-06-03 1984-12-17 Hitachi Ltd 半導体装置
JPS6010765A (ja) * 1983-06-30 1985-01-19 Fujitsu Ltd 半導体装置
US4692781B2 (en) * 1984-06-06 1998-01-20 Texas Instruments Inc Semiconductor device with electrostatic discharge protection
JPS6132464A (ja) * 1984-07-24 1986-02-15 Nec Corp Ｃｍｏｓ型集積回路装置
US4763184A (en) * 1985-04-30 1988-08-09 Waferscale Integration, Inc. Input circuit for protecting against damage caused by electrostatic discharge
JPH06153761A (ja) * 1992-11-19 1994-06-03 Syst:Kk デポジッターの充填方法および充填装置

Also Published As

Publication number Publication date
KR910003834B1 (ko) 1991-06-12
US4893159A (en) 1990-01-09
JPH0518469B2 (enExample) 1993-03-12
EP0215493A1 (en) 1987-03-25
JPS6271275A (ja) 1987-04-01
EP0215493B1 (en) 1990-12-19
KR870003578A (ko) 1987-04-18

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Legal Events

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8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)