JPS5683964A - Input protective device - Google Patents

Input protective device

Info

Publication number
JPS5683964A
JPS5683964A JP16196179A JP16196179A JPS5683964A JP S5683964 A JPS5683964 A JP S5683964A JP 16196179 A JP16196179 A JP 16196179A JP 16196179 A JP16196179 A JP 16196179A JP S5683964 A JPS5683964 A JP S5683964A
Authority
JP
Japan
Prior art keywords
layer
resistance layer
resistor
film
protective device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16196179A
Other languages
Japanese (ja)
Other versions
JPS648469B2 (en
Inventor
Jiro Suma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16196179A priority Critical patent/JPS5683964A/en
Publication of JPS5683964A publication Critical patent/JPS5683964A/en
Publication of JPS648469B2 publication Critical patent/JPS648469B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0288Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To make small an occupied area by holding satisfactorily the protective function at the same time by a method wherein when a diffused layer resistor which is the input protective device is connected to a transistor intended to be protected, the protective device is formed on the diffused layer comprising a high resistance layer and low resistance layer. CONSTITUTION:A gate of a protected transistor T2 is connected with a transistor T2 for cramping a surge voltage and the diffused layer resistor R for making the wave form of the surge voltage gentle. In this construction, the resistor R is composed of the diffused layer comprising the high resistance layer and low resistance layer. Namely, an oxidized film 2 is cover-attached to a P type Si substrate and a window is opened into which phosphorous ions are injected and then, a press-in diffusion is applied thereto to first form an N type high resistance layer 3. In the next place, after a window is perforated again into the oxidized film which has been grown at this time, corresponded to the central part of the layer 3, and an N type low resistance layer 4 which is projected from the inside of the layer 3 into the substrate 1 is formed by the diffusion, an opening is formed in the film 2 and a metal electrode 5 is cover-attached to the layer 3 while being extended over the film 2.
JP16196179A 1979-12-13 1979-12-13 Input protective device Granted JPS5683964A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16196179A JPS5683964A (en) 1979-12-13 1979-12-13 Input protective device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16196179A JPS5683964A (en) 1979-12-13 1979-12-13 Input protective device

Publications (2)

Publication Number Publication Date
JPS5683964A true JPS5683964A (en) 1981-07-08
JPS648469B2 JPS648469B2 (en) 1989-02-14

Family

ID=15745352

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16196179A Granted JPS5683964A (en) 1979-12-13 1979-12-13 Input protective device

Country Status (1)

Country Link
JP (1) JPS5683964A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0058557A1 (en) * 1981-02-17 1982-08-25 Fujitsu Limited Protection element for a semiconductor device
EP0102647A2 (en) * 1982-09-07 1984-03-14 Kabushiki Kaisha Toshiba Input protection device for C-MOS device
JPS59218764A (en) * 1983-05-27 1984-12-10 Hitachi Ltd Semiconductor integrated circuit device
JPS6271275A (en) * 1985-09-25 1987-04-01 Toshiba Corp Semiconductor integrated circuit
US4830976A (en) * 1984-10-01 1989-05-16 American Telephone And Telegraph Company, At&T Bell Laboratories Integrated circuit resistor
JPH02119244A (en) * 1988-10-28 1990-05-07 Nec Corp Manufacture of semiconductor integrated circuit
EP0448119A2 (en) * 1990-03-22 1991-09-25 Kabushiki Kaisha Toshiba Input protection resistor used in input protection circuit
US5521413A (en) * 1993-11-25 1996-05-28 Nec Corporation Semiconductor device having a solid metal wiring with a contact portion for improved protection

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4602267A (en) * 1981-02-17 1986-07-22 Fujitsu Limited Protection element for semiconductor device
EP0058557A1 (en) * 1981-02-17 1982-08-25 Fujitsu Limited Protection element for a semiconductor device
US4872045A (en) * 1982-09-07 1989-10-03 Tokyo Shibaura Denki Kabushiki Kaisha Input protection device for C-MOS device
EP0102647A2 (en) * 1982-09-07 1984-03-14 Kabushiki Kaisha Toshiba Input protection device for C-MOS device
JPS59218764A (en) * 1983-05-27 1984-12-10 Hitachi Ltd Semiconductor integrated circuit device
JPH0526344B2 (en) * 1983-05-27 1993-04-15 Hitachi Ltd
US4830976A (en) * 1984-10-01 1989-05-16 American Telephone And Telegraph Company, At&T Bell Laboratories Integrated circuit resistor
JPS6271275A (en) * 1985-09-25 1987-04-01 Toshiba Corp Semiconductor integrated circuit
US4893159A (en) * 1985-09-25 1990-01-09 Kabushiki Kaisha Toshiba Protected MOS transistor circuit
JPH0518469B2 (en) * 1985-09-25 1993-03-12 Tokyo Shibaura Electric Co
JPH02119244A (en) * 1988-10-28 1990-05-07 Nec Corp Manufacture of semiconductor integrated circuit
EP0448119A2 (en) * 1990-03-22 1991-09-25 Kabushiki Kaisha Toshiba Input protection resistor used in input protection circuit
US5181092A (en) * 1990-03-22 1993-01-19 Kabushiki Kaisha Toshiba Input protection resistor used in input protection circuit
US5521413A (en) * 1993-11-25 1996-05-28 Nec Corporation Semiconductor device having a solid metal wiring with a contact portion for improved protection

Also Published As

Publication number Publication date
JPS648469B2 (en) 1989-02-14

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