DE3585669D1 - Verbesserte programmierbare logische netzvorrichtung mit verwendung der cmos-eprom-floating-gate-technologie. - Google Patents

Verbesserte programmierbare logische netzvorrichtung mit verwendung der cmos-eprom-floating-gate-technologie.

Info

Publication number
DE3585669D1
DE3585669D1 DE8585903154T DE3585669T DE3585669D1 DE 3585669 D1 DE3585669 D1 DE 3585669D1 DE 8585903154 T DE8585903154 T DE 8585903154T DE 3585669 T DE3585669 T DE 3585669T DE 3585669 D1 DE3585669 D1 DE 3585669D1
Authority
DE
Germany
Prior art keywords
drivers
feedback
network device
floating gate
logical network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585903154T
Other languages
English (en)
Inventor
F Hartmann
Yiu-Fai Chan
Robert Frankovich
Jung-Hsing Ou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Altera Corp
Original Assignee
Altera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Altera Corp filed Critical Altera Corp
Application granted granted Critical
Publication of DE3585669D1 publication Critical patent/DE3585669D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H03K19/17712—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays one of the matrices at least being reprogrammable
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H03K19/17716—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays with synchronous operation, i.e. using clock signals, e.g. of I/O or coupling register

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Non-Volatile Memory (AREA)
DE8585903154T 1984-06-14 1985-06-12 Verbesserte programmierbare logische netzvorrichtung mit verwendung der cmos-eprom-floating-gate-technologie. Expired - Lifetime DE3585669D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/620,451 US4609986A (en) 1984-06-14 1984-06-14 Programmable logic array device using EPROM technology
PCT/US1985/001111 WO1986000165A1 (en) 1984-06-14 1985-06-12 An improved programmable logic array device using eprom technology

Publications (1)

Publication Number Publication Date
DE3585669D1 true DE3585669D1 (de) 1992-04-23

Family

ID=24486007

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585903154T Expired - Lifetime DE3585669D1 (de) 1984-06-14 1985-06-12 Verbesserte programmierbare logische netzvorrichtung mit verwendung der cmos-eprom-floating-gate-technologie.

Country Status (7)

Country Link
US (1) US4609986A (de)
EP (1) EP0183828B1 (de)
JP (1) JPS61502650A (de)
AT (1) ATE73958T1 (de)
AU (1) AU4439785A (de)
DE (1) DE3585669D1 (de)
WO (1) WO1986000165A1 (de)

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US4609986A (en) 1986-09-02
AU4439785A (en) 1986-01-10
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EP0183828A1 (de) 1986-06-11
EP0183828B1 (de) 1992-03-18

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