JPS5748834A - Programmable logic array device - Google Patents

Programmable logic array device

Info

Publication number
JPS5748834A
JPS5748834A JP55124290A JP12429080A JPS5748834A JP S5748834 A JPS5748834 A JP S5748834A JP 55124290 A JP55124290 A JP 55124290A JP 12429080 A JP12429080 A JP 12429080A JP S5748834 A JPS5748834 A JP S5748834A
Authority
JP
Japan
Prior art keywords
lines
affirmative
pair
output signal
negative
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55124290A
Other languages
Japanese (ja)
Inventor
Kunihiko Hirashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Corp
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Corp, Pioneer Electronic Corp filed Critical Pioneer Corp
Priority to JP55124290A priority Critical patent/JPS5748834A/en
Publication of JPS5748834A publication Critical patent/JPS5748834A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To remarkably reduce the number of elements and to make the size small, by relating either of a pair of affirmative and negative signal lines to a corresponding output signal line via one information transmitting element in accordance with the desired logical equation of the output signal line. CONSTITUTION:A pair of affirmative signal lines 1a-3a and negative signal lines 1b-3b are provided to logical input signals x1-x3, and output signal lines 11-13 are provided so that they are crossed with the signal pair lines. Between one of the output lines 11-13 and pair of affirmative and negative signal lines 1a-3a, 1b- 3b, one FET element only is provided, and either one of the affirmative and negative logical signals is related to one output signal line. The gates of the FETs at the cross point among lines without relation are grounded with common earth.
JP55124290A 1980-09-08 1980-09-08 Programmable logic array device Pending JPS5748834A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55124290A JPS5748834A (en) 1980-09-08 1980-09-08 Programmable logic array device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55124290A JPS5748834A (en) 1980-09-08 1980-09-08 Programmable logic array device

Publications (1)

Publication Number Publication Date
JPS5748834A true JPS5748834A (en) 1982-03-20

Family

ID=14881675

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55124290A Pending JPS5748834A (en) 1980-09-08 1980-09-08 Programmable logic array device

Country Status (1)

Country Link
JP (1) JPS5748834A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0109125A2 (en) * 1982-11-10 1984-05-23 Philips Electronics Uk Limited Logic circuit array
US4687959A (en) * 1986-03-27 1987-08-18 Motorola, Inc. Method and apparatus for access to a PLA
USRE33676E (en) * 1985-12-27 1991-08-27 Nec Corporation Gate array circuit for decoding circuits

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0109125A2 (en) * 1982-11-10 1984-05-23 Philips Electronics Uk Limited Logic circuit array
USRE33676E (en) * 1985-12-27 1991-08-27 Nec Corporation Gate array circuit for decoding circuits
US4687959A (en) * 1986-03-27 1987-08-18 Motorola, Inc. Method and apparatus for access to a PLA

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