DE3485983D1 - Bitzeilenlast und spaltenschaltung fuer einen halbleiterspeicher. - Google Patents

Bitzeilenlast und spaltenschaltung fuer einen halbleiterspeicher.

Info

Publication number
DE3485983D1
DE3485983D1 DE8989200420T DE3485983T DE3485983D1 DE 3485983 D1 DE3485983 D1 DE 3485983D1 DE 8989200420 T DE8989200420 T DE 8989200420T DE 3485983 T DE3485983 T DE 3485983T DE 3485983 D1 DE3485983 D1 DE 3485983D1
Authority
DE
Germany
Prior art keywords
bit line
semiconductor memory
line load
column switching
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8989200420T
Other languages
English (en)
Other versions
DE3485983T2 (de
Inventor
Kim C Hardee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thorn EMI North America Inc
Original Assignee
Thorn EMI North America Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thorn EMI North America Inc filed Critical Thorn EMI North America Inc
Publication of DE3485983D1 publication Critical patent/DE3485983D1/de
Application granted granted Critical
Publication of DE3485983T2 publication Critical patent/DE3485983T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
DE8989200420T 1983-09-21 1984-08-24 Bitzeilenlast und spaltenschaltung fuer einen halbleiterspeicher. Expired - Fee Related DE3485983T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US53448483A 1983-09-21 1983-09-21
US06/633,091 US4791613A (en) 1983-09-21 1984-07-25 Bit line and column circuitry used in a semiconductor memory

Publications (2)

Publication Number Publication Date
DE3485983D1 true DE3485983D1 (de) 1992-12-17
DE3485983T2 DE3485983T2 (de) 1993-04-01

Family

ID=27064483

Family Applications (2)

Application Number Title Priority Date Filing Date
DE8989200420T Expired - Fee Related DE3485983T2 (de) 1983-09-21 1984-08-24 Bitzeilenlast und spaltenschaltung fuer einen halbleiterspeicher.
DE8484305826T Expired - Lifetime DE3482521D1 (de) 1983-09-21 1984-08-24 Bitleitungslast und spalteschaltungen fuer einen halbleiterspeicher.

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE8484305826T Expired - Lifetime DE3482521D1 (de) 1983-09-21 1984-08-24 Bitleitungslast und spalteschaltungen fuer einen halbleiterspeicher.

Country Status (3)

Country Link
US (2) US4791613A (de)
EP (1) EP0136811B1 (de)
DE (2) DE3485983T2 (de)

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JPS61237290A (ja) * 1985-04-12 1986-10-22 Sony Corp ビツト線駆動回路
JPS6240697A (ja) * 1985-08-16 1987-02-21 Fujitsu Ltd 半導体記憶装置
US4905189B1 (en) * 1985-12-18 1993-06-01 System for reading and writing information
JPS639097A (ja) * 1986-06-30 1988-01-14 Sony Corp スタテイツクｒａｍ
JPH0736272B2 (ja) * 1986-12-24 1995-04-19 株式会社日立製作所 半導体集積回路装置
US4785427A (en) * 1987-01-28 1988-11-15 Cypress Semiconductor Corporation Differential bit line clamp
US4825413A (en) * 1987-02-24 1989-04-25 Texas Instruments Incorporated Bipolar-CMOS static ram memory device
US4961168A (en) * 1987-02-24 1990-10-02 Texas Instruments Incorporated Bipolar-CMOS static random access memory device with bit line bias control
JP2569538B2 (ja) * 1987-03-17 1997-01-08 ソニー株式会社 メモリ装置
JPS63304491A (ja) * 1987-06-04 1988-12-12 Mitsubishi Electric Corp 半導体メモリ
US5010520A (en) * 1987-07-29 1991-04-23 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device with stabilized data write characteristic
US4918663A (en) * 1987-09-16 1990-04-17 Motorola, Inc. Latch-up control for a CMOS memory with a pumped well
GB2213009B (en) * 1987-11-27 1992-02-05 Sony Corp Memories having bit line loads controlled by p-channel mis transistors
US4926383A (en) * 1988-02-02 1990-05-15 National Semiconductor Corporation BiCMOS write-recovery circuit
US4862421A (en) * 1988-02-16 1989-08-29 Texas Instruments Incorporated Sensing and decoding scheme for a BiCMOS read/write memory
KR100213602B1 (ko) * 1988-05-13 1999-08-02 가나이 쓰도무 다이나믹형 반도체 기억장치
JPH01298593A (ja) * 1988-05-26 1989-12-01 Nec Corp 化合物半導体メモリの書き込み回路
US5161121A (en) * 1988-06-27 1992-11-03 Oki Electric Industry Co., Ltd. Random access memory including word line clamping circuits
US4975877A (en) * 1988-10-20 1990-12-04 Logic Devices Incorporated Static semiconductor memory with improved write recovery and column address circuitry
US5042011A (en) * 1989-05-22 1991-08-20 Micron Technology, Inc. Sense amplifier pulldown device with tailored edge input
JP2701506B2 (ja) * 1990-02-08 1998-01-21 日本電気株式会社 半導体メモリ回路
US5036492A (en) * 1990-02-15 1991-07-30 Advanced Micro Devices, Inc. CMOS precharge and equalization circuit
US5155703A (en) * 1990-07-06 1992-10-13 Motorola, Inc. Bicmos bit line load for a memory with improved reliability
US5155702A (en) * 1990-11-30 1992-10-13 Samsung Electronics Co., Ltd. Semiconductor memory device
JP2876799B2 (ja) * 1991-03-13 1999-03-31 富士通株式会社 半導体記憶装置
US5325331A (en) * 1991-04-04 1994-06-28 Micron Technology, Inc. Improved device for sensing information store in a dynamic memory
US5220221A (en) * 1992-03-06 1993-06-15 Micron Technology, Inc. Sense amplifier pulldown circuit for minimizing ground noise at high power supply voltages
JP2812097B2 (ja) * 1992-09-30 1998-10-15 日本電気株式会社 半導体記憶装置
KR950014255B1 (ko) * 1992-12-31 1995-11-23 현대전자산업주식회사 고속동작을 위한 데이타 패스 구조를 갖는 반도체 메모리소자
US6016390A (en) * 1998-01-29 2000-01-18 Artisan Components, Inc. Method and apparatus for eliminating bitline voltage offsets in memory devices
US6160743A (en) * 2000-03-21 2000-12-12 Mosel Vitelic, Inc. Self-timed data amplifier and method for an integrated circuit memory device
US6252806B1 (en) 2000-05-26 2001-06-26 International Business Machines Corporation Multi-generator, partial array Vt tracking system to improve array retention time
US6549470B2 (en) 2000-08-31 2003-04-15 United Memories, Inc. Small signal, low power read data bus driver for integrated circuit devices incorporating memory arrays
US6570447B2 (en) 2001-05-25 2003-05-27 Infineon Technologies Ag Programmable logarithmic gain adjustment for open-loop amplifiers
CN100555375C (zh) * 2004-09-17 2009-10-28 日本电气株式会社 半导体器件、使用该器件的电路和显示设备及其驱动方法
US7547310B2 (en) * 2005-03-29 2009-06-16 Tyco Healthcare Group Lp Specimen retrieval apparatus
CN100412991C (zh) * 2006-07-05 2008-08-20 北京大学 利用深亚微米cmos标准工艺实现的eeprom电平转换电路及方法
JP2009140558A (ja) * 2007-12-05 2009-06-25 Toshiba Corp 半導体記憶装置
JP4579965B2 (ja) * 2007-12-19 2010-11-10 パナソニック株式会社 半導体記憶装置
TWI392231B (zh) * 2009-08-04 2013-04-01 Raydium Semiconductor Corp 電路結構
US8295099B1 (en) * 2010-05-28 2012-10-23 Xilinx, Inc. Dual port memory with write assist
GB2500907B (en) * 2012-04-04 2016-05-25 Platipus Ltd Static random access memory devices

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3967252A (en) * 1974-10-03 1976-06-29 Mostek Corporation Sense AMP for random access memory
FR2304991A1 (fr) * 1975-03-15 1976-10-15 Ibm Agencement de circuits pour memoire semi-conductrice et son procede de fonctionnement
US4045785A (en) * 1975-11-05 1977-08-30 American Microsystems, Inc. Sense amplifier for static memory device
US4131951A (en) * 1976-05-17 1978-12-26 Tokyo Shibaura Electric Co., Ltd. High speed complementary MOS memory
JPS5472641A (en) * 1977-11-21 1979-06-11 Toshiba Corp Voltage detection circuit
JPS6044747B2 (ja) * 1978-05-15 1985-10-05 日本電気株式会社 メモリ装置
US4195356A (en) * 1978-11-16 1980-03-25 Electronic Memories And Magnetics Corporation Sense line termination circuit for semiconductor memory systems
JPS5951072B2 (ja) * 1979-02-26 1984-12-12 日本電気株式会社 半導体メモリ装置
JPS55132589A (en) * 1979-03-30 1980-10-15 Fujitsu Ltd Semiconductor memory unit
JPS5847792B2 (ja) * 1979-07-26 1983-10-25 富士通株式会社 ビット線制御回路
JPS5665395A (en) * 1979-10-30 1981-06-03 Fujitsu Ltd Bit-line voltage level setting circuit
JPS5668991A (en) * 1979-11-05 1981-06-09 Hitachi Ltd Complementary mis memory circuit
US4387447A (en) * 1980-02-04 1983-06-07 Texas Instruments Incorporated Column and ground select sequence in electrically programmable memory
JPS6027113B2 (ja) * 1980-02-13 1985-06-27 日本電気株式会社 プリチャ−ジ装置
JPS592997B2 (ja) * 1980-05-22 1984-01-21 富士通株式会社 スタテイツクメモリ
US4453235A (en) * 1980-05-27 1984-06-05 Supertex, Inc. Integrated memory circuits
US4355377A (en) * 1980-06-30 1982-10-19 Inmos Corporation Asynchronously equillibrated and pre-charged static ram
JPS5838873B2 (ja) * 1980-10-15 1983-08-25 富士通株式会社 センス回路
JPS57127989A (en) * 1981-02-02 1982-08-09 Hitachi Ltd Mos static type ram
US4451907A (en) * 1981-10-26 1984-05-29 Motorola, Inc. Pull-up circuit for a memory
JPS589514B2 (ja) * 1981-11-24 1983-02-21 株式会社日立製作所 半導体メモリのコモンデ−タ線負荷回路
US4460985A (en) * 1982-02-19 1984-07-17 International Business Machines Corporation Sense amplifier for MOS static memory array

Also Published As

Publication number Publication date
US4791613A (en) 1988-12-13
EP0136811B1 (de) 1990-06-13
DE3482521D1 (de) 1990-07-19
EP0136811A2 (de) 1985-04-10
DE3485983T2 (de) 1993-04-01
EP0136811A3 (en) 1987-03-25
USRE35154E (en) 1996-02-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee