JPS55132589A - Semiconductor memory unit - Google Patents

Semiconductor memory unit

Info

Publication number
JPS55132589A
JPS55132589A JP3790279A JP3790279A JPS55132589A JP S55132589 A JPS55132589 A JP S55132589A JP 3790279 A JP3790279 A JP 3790279A JP 3790279 A JP3790279 A JP 3790279A JP S55132589 A JPS55132589 A JP S55132589A
Authority
JP
Japan
Prior art keywords
memory unit
transistors
semiconductor memory
constitution
power consumption
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3790279A
Other languages
Japanese (ja)
Other versions
JPS6115518B2 (en
Inventor
Hiroshi Shimada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3790279A priority Critical patent/JPS55132589A/en
Publication of JPS55132589A publication Critical patent/JPS55132589A/en
Publication of JPS6115518B2 publication Critical patent/JPS6115518B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To reduce the power consumption of the static type semiconductor memory unit, by conductive control of bit line load transistor with the column selection signal.
CONSTITUTION: The column selection signal is fed to the gate of bit line load transistors Q1, Q2... of enhancement type and the transistors Q1, Q2... are in conductive control with this signal. With this constitution, the transistors Q1, Q2... are used for only the memory cells C1, C2 selected with the selection signals Y1, Y2 and they are not required for the memory cells not selected, then the transistor to the selected cells C1, C2 only is ON and others are all OFF. Accordingly, the power consumption of memory unit can remarkably be reduced.
COPYRIGHT: (C)1980,JPO&Japio
JP3790279A 1979-03-30 1979-03-30 Semiconductor memory unit Granted JPS55132589A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3790279A JPS55132589A (en) 1979-03-30 1979-03-30 Semiconductor memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3790279A JPS55132589A (en) 1979-03-30 1979-03-30 Semiconductor memory unit

Publications (2)

Publication Number Publication Date
JPS55132589A true JPS55132589A (en) 1980-10-15
JPS6115518B2 JPS6115518B2 (en) 1986-04-24

Family

ID=12510464

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3790279A Granted JPS55132589A (en) 1979-03-30 1979-03-30 Semiconductor memory unit

Country Status (1)

Country Link
JP (1) JPS55132589A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59217288A (en) * 1983-05-25 1984-12-07 Matsushita Electric Ind Co Ltd Storage device
US4528646A (en) * 1981-07-08 1985-07-09 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor memory with selectively enabled precharge and sense amplifier circuits
JPS60154394A (en) * 1983-09-21 1985-08-14 ソーン、イーエムアイ、ノース、アメリカ、インコーポレーテッド Bit line load for semiconductor memory
JPS62121987A (en) * 1985-11-21 1987-06-03 Sony Corp Memory circuit
US4813021A (en) * 1981-07-27 1989-03-14 Tokyo Shibayra Denki Kabushiki Kaisha Semiconductor memory device with delayed precharge signals
USRE35154E (en) * 1983-09-21 1996-02-13 Thorn Emi North America, Inc. Bit line and column circuitry used in a semiconductor memory
US5587952A (en) * 1984-12-17 1996-12-24 Hitachi, Ltd. Dynamic random access memory including read preamplifiers activated before rewrite amplifiers

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100440763B1 (en) * 2002-04-19 2004-07-21 전자부품연구원 Optical waveguide-type filter device for flattening gain and method for manufacturing the same

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4528646A (en) * 1981-07-08 1985-07-09 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor memory with selectively enabled precharge and sense amplifier circuits
US4813021A (en) * 1981-07-27 1989-03-14 Tokyo Shibayra Denki Kabushiki Kaisha Semiconductor memory device with delayed precharge signals
JPS59217288A (en) * 1983-05-25 1984-12-07 Matsushita Electric Ind Co Ltd Storage device
JPS60154394A (en) * 1983-09-21 1985-08-14 ソーン、イーエムアイ、ノース、アメリカ、インコーポレーテッド Bit line load for semiconductor memory
JPH036599B2 (en) * 1983-09-21 1991-01-30 Soon Ii Emu Ai Noosu Amerika Inc
USRE35154E (en) * 1983-09-21 1996-02-13 Thorn Emi North America, Inc. Bit line and column circuitry used in a semiconductor memory
US5587952A (en) * 1984-12-17 1996-12-24 Hitachi, Ltd. Dynamic random access memory including read preamplifiers activated before rewrite amplifiers
JPS62121987A (en) * 1985-11-21 1987-06-03 Sony Corp Memory circuit

Also Published As

Publication number Publication date
JPS6115518B2 (en) 1986-04-24

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