DE3270694D1 - Semiconductor integrated circuit device with test circuit - Google Patents

Semiconductor integrated circuit device with test circuit

Info

Publication number
DE3270694D1
DE3270694D1 DE8282306996T DE3270694T DE3270694D1 DE 3270694 D1 DE3270694 D1 DE 3270694D1 DE 8282306996 T DE8282306996 T DE 8282306996T DE 3270694 T DE3270694 T DE 3270694T DE 3270694 D1 DE3270694 D1 DE 3270694D1
Authority
DE
Germany
Prior art keywords
transistor
inspection circuit
input portion
semiconductor integrated
output pin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282306996T
Other languages
English (en)
Inventor
Takashi Horii
Tomio Nakano
Masao Nakano
Norihisa Tsuge
Junji Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3270694D1 publication Critical patent/DE3270694D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/835—Masking faults in memories by using spares or by reconfiguring using programmable devices with roll call arrangements for redundant substitutions
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE8282306996T 1981-12-29 1982-12-30 Semiconductor integrated circuit device with test circuit Expired DE3270694D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56211399A JPS58115828A (ja) 1981-12-29 1981-12-29 半導体集積回路

Publications (1)

Publication Number Publication Date
DE3270694D1 true DE3270694D1 (en) 1986-05-22

Family

ID=16605317

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282306996T Expired DE3270694D1 (en) 1981-12-29 1982-12-30 Semiconductor integrated circuit device with test circuit

Country Status (5)

Country Link
US (1) US4583179A (de)
EP (1) EP0086310B1 (de)
JP (1) JPS58115828A (de)
DE (1) DE3270694D1 (de)
IE (1) IE53833B1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58154257A (ja) * 1982-03-10 1983-09-13 Hitachi Ltd 半導体メモリ集積回路装置
US4731759A (en) * 1985-03-18 1988-03-15 Nec Corporation Integrated circuit with built-in indicator of internal repair
US4674089A (en) * 1985-04-16 1987-06-16 Intel Corporation In-circuit emulator
JPS61292296A (ja) * 1985-05-20 1986-12-23 Fujitsu Ltd 半導体記憶装置
JPS6214399A (ja) * 1985-07-12 1987-01-22 Fujitsu Ltd 半導体記憶装置
DE3526485A1 (de) * 1985-07-24 1987-02-05 Heinz Krug Schaltungsanordnung zum pruefen integrierter schaltungseinheiten
US4641247A (en) * 1985-08-30 1987-02-03 Advanced Micro Devices, Inc. Bit-sliced, dual-bus design of integrated circuits
JP2530610B2 (ja) * 1986-02-27 1996-09-04 富士通株式会社 半導体記憶装置
US4857774A (en) * 1986-09-19 1989-08-15 Actel Corporation Testing apparatus and diagnostic method for use with programmable interconnect architecture
JPH071639B2 (ja) * 1986-12-11 1995-01-11 三菱電機株式会社 半導体装置
US5014226A (en) * 1988-09-29 1991-05-07 Lsi Logic Corporation Method and apparatus for predicting the metastable behavior of logic circuits
US5019772A (en) * 1989-05-23 1991-05-28 International Business Machines Corporation Test selection techniques
DE58908287D1 (de) * 1989-06-30 1994-10-06 Siemens Ag Integrierte Schaltungsanordnung.
JPH03211481A (ja) * 1990-01-17 1991-09-17 Nec Corp Ｌｓｉテスト回路
US5528600A (en) * 1991-01-28 1996-06-18 Actel Corporation Testability circuits for logic arrays
FR2710445B1 (fr) * 1993-09-20 1995-11-03 Sgs Thomson Microelectronics Circuit de redondance dynamique pour mémoire en circuit intégré.

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5721799B2 (de) * 1975-02-01 1982-05-10
US4047163A (en) * 1975-07-03 1977-09-06 Texas Instruments Incorporated Fault-tolerant cell addressable array
JPS5853440B2 (ja) * 1978-11-25 1983-11-29 富士通株式会社 テストビット選択用論理回路
US4281398A (en) * 1980-02-12 1981-07-28 Mostek Corporation Block redundancy for memory array
US4346459A (en) * 1980-06-30 1982-08-24 Inmos Corporation Redundancy scheme for an MOS memory
US4441170A (en) * 1980-09-30 1984-04-03 Intel Corporation Memory redundancy apparatus for single chip memories
US4380066A (en) * 1980-12-04 1983-04-12 Burroughs Corporation Defect tolerant memory
US4446534A (en) * 1980-12-08 1984-05-01 National Semiconductor Corporation Programmable fuse circuit
US4376300A (en) * 1981-01-02 1983-03-08 Intel Corporation Memory system employing mostly good memories
US4422161A (en) * 1981-10-08 1983-12-20 Rca Corporation Memory array with redundant elements
US4480199A (en) * 1982-03-19 1984-10-30 Fairchild Camera & Instrument Corp. Identification of repaired integrated circuits

Also Published As

Publication number Publication date
US4583179A (en) 1986-04-15
IE823102L (en) 1983-06-29
EP0086310B1 (de) 1986-04-16
JPH03719B2 (de) 1991-01-08
IE53833B1 (en) 1989-03-15
JPS58115828A (ja) 1983-07-09
EP0086310A1 (de) 1983-08-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition