ATE70639T1 - Logische schaltung mit verbesserter testmoeglichkeit fuer defekte durchgangskontakte. - Google Patents
Logische schaltung mit verbesserter testmoeglichkeit fuer defekte durchgangskontakte.Info
- Publication number
- ATE70639T1 ATE70639T1 AT86901643T AT86901643T ATE70639T1 AT E70639 T1 ATE70639 T1 AT E70639T1 AT 86901643 T AT86901643 T AT 86901643T AT 86901643 T AT86901643 T AT 86901643T AT E70639 T1 ATE70639 T1 AT E70639T1
- Authority
- AT
- Austria
- Prior art keywords
- conductor
- defective
- logic circuit
- improved test
- couples
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31712—Input or output aspects
- G01R31/31717—Interconnect testing
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
- G01R31/318513—Test of Multi-Chip-Moduls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Automation & Control Theory (AREA)
- Semiconductor Integrated Circuits (AREA)
- Tests Of Electronic Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Monitoring And Testing Of Exchanges (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US70519285A | 1985-02-25 | 1985-02-25 | |
PCT/US1986/000330 WO1986004995A1 (en) | 1985-02-25 | 1986-02-18 | Logic circuit having improved testability for defective via contacts |
EP86901643A EP0214229B1 (de) | 1985-02-25 | 1986-02-18 | Logische schaltung mit verbesserter testmöglichkeit für defekte durchgangskontakte |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE70639T1 true ATE70639T1 (de) | 1992-01-15 |
Family
ID=24832428
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT86901643T ATE70639T1 (de) | 1985-02-25 | 1986-02-18 | Logische schaltung mit verbesserter testmoeglichkeit fuer defekte durchgangskontakte. |
Country Status (6)
Country | Link |
---|---|
US (1) | US4697139A (de) |
EP (1) | EP0214229B1 (de) |
JP (1) | JPH0727007B2 (de) |
AT (1) | ATE70639T1 (de) |
DE (1) | DE3682981D1 (de) |
WO (1) | WO1986004995A1 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4779041A (en) * | 1987-05-20 | 1988-10-18 | Hewlett-Packard Company | Integrated circuit transfer test device system |
CH691237A5 (fr) * | 1997-07-15 | 2001-05-31 | Em Microelectronic Marin Sa | Photocapteur intégré. |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3792349A (en) * | 1972-10-25 | 1974-02-12 | Honeywell Inf Systems | Dual channel, dual potential open-circuit test apparatus |
JPS5810070B2 (ja) * | 1981-01-07 | 1983-02-24 | 日本たばこ産業株式会社 | 紙巻たばこ解放分離装置 |
US4499579A (en) * | 1983-03-10 | 1985-02-12 | Honeywell Information Systems Inc. | Programmable logic array with dynamic test capability in the unprogrammed state |
-
1986
- 1986-02-18 WO PCT/US1986/000330 patent/WO1986004995A1/en active IP Right Grant
- 1986-02-18 EP EP86901643A patent/EP0214229B1/de not_active Expired - Lifetime
- 1986-02-18 DE DE8686901643T patent/DE3682981D1/de not_active Expired - Fee Related
- 1986-02-18 AT AT86901643T patent/ATE70639T1/de not_active IP Right Cessation
- 1986-02-18 JP JP61501263A patent/JPH0727007B2/ja not_active Expired - Lifetime
-
1987
- 1987-02-02 US US07/011,368 patent/US4697139A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE3682981D1 (de) | 1992-01-30 |
EP0214229A1 (de) | 1987-03-18 |
US4697139A (en) | 1987-09-29 |
WO1986004995A1 (en) | 1986-08-28 |
JPH0727007B2 (ja) | 1995-03-29 |
JPS62500262A (ja) | 1987-01-29 |
EP0214229B1 (de) | 1991-12-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |