DE3242234C2 - - Google Patents

Info

Publication number
DE3242234C2
DE3242234C2 DE3242234A DE3242234A DE3242234C2 DE 3242234 C2 DE3242234 C2 DE 3242234C2 DE 3242234 A DE3242234 A DE 3242234A DE 3242234 A DE3242234 A DE 3242234A DE 3242234 C2 DE3242234 C2 DE 3242234C2
Authority
DE
Germany
Prior art keywords
transistor
collector
emitter
circuit
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE3242234A
Other languages
German (de)
English (en)
Other versions
DE3242234A1 (de
Inventor
Hiroyuki Kokubunji Jp Itoh
Akira Tokio/Tokyo Jp Masaki
Hiroki Ome Jp Yamashita
Satoshi Higashiyamato Jp Hososaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE3242234A1 publication Critical patent/DE3242234A1/de
Application granted granted Critical
Publication of DE3242234C2 publication Critical patent/DE3242234C2/de
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1735—Controllable logic circuits by wiring, e.g. uncommitted logic arrays
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/288—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
    • H03K3/2885—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit the input circuit having a differential configuration

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
DE19823242234 1981-11-16 1982-11-15 Hochintegrierte halbleiterspeicherschaltung Granted DE3242234A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56182268A JPS5884445A (ja) 1981-11-16 1981-11-16 大規模集積回路

Publications (2)

Publication Number Publication Date
DE3242234A1 DE3242234A1 (de) 1983-05-26
DE3242234C2 true DE3242234C2 (enExample) 1989-07-13

Family

ID=16115280

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19823242234 Granted DE3242234A1 (de) 1981-11-16 1982-11-15 Hochintegrierte halbleiterspeicherschaltung

Country Status (3)

Country Link
US (1) US4586169A (enExample)
JP (1) JPS5884445A (enExample)
DE (1) DE3242234A1 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59172249A (ja) * 1983-03-18 1984-09-28 Nec Corp モノリシツク集積回路
JPS6145491A (ja) * 1984-08-10 1986-03-05 Fujitsu Ltd 半導体記憶装置
US4733372A (en) * 1985-08-23 1988-03-22 Hitachi, Ltd. Semiconductor memory having redundancy
US4999519A (en) * 1987-12-04 1991-03-12 Hitachi Vlsi Engineering Corporation Semiconductor circuit with low power consumption having emitter-coupled logic or differential amplifier
US5023838A (en) * 1988-12-02 1991-06-11 Ncr Corporation Random access memory device with integral logic capability
EP0421016A1 (de) * 1989-10-06 1991-04-10 Siemens Aktiengesellschaft ECL-TTL-Signalpegelwandler
US5196742A (en) * 1992-06-26 1993-03-23 National Semiconductor Corporation Low voltage differential circuit
JPH0677426A (ja) * 1992-08-26 1994-03-18 Sunao Shibata 半導体集積回路
US20150009747A1 (en) * 2013-07-02 2015-01-08 Akbar Ghazinour Phase switchable bistable memory device, a frequency divider and a radio frequency transceiver

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3365707A (en) * 1967-06-23 1968-01-23 Rca Corp Lsi array and standard cells
US3538348A (en) * 1967-07-10 1970-11-03 Motorola Inc Sense-write circuits for coupling current mode logic circuits to saturating type memory cells
US3573488A (en) * 1967-09-05 1971-04-06 Rca Corp Electrical system and lsi standard cells
US3705390A (en) * 1971-05-26 1972-12-05 Gen Electric Content addressed memory cell with selective bit writing
US3808475A (en) * 1972-07-10 1974-04-30 Amdahl Corp Lsi chip construction and method
US4009472A (en) * 1975-05-16 1977-02-22 Ibm Corporation Dynamic associative cell
US4070657A (en) * 1977-01-03 1978-01-24 Honeywell Information Systems Inc. Current mode simultaneous dual-read/single-write memory device
US4249193A (en) * 1978-05-25 1981-02-03 International Business Machines Corporation LSI Semiconductor device and fabrication thereof
US4278897A (en) * 1978-12-28 1981-07-14 Fujitsu Limited Large scale semiconductor integrated circuit device
JPS55142487A (en) * 1979-04-25 1980-11-07 Hitachi Ltd Bipolar memory circuit
US4408134A (en) * 1981-01-19 1983-10-04 Advanced Micro Devices, Inc. Unitary exclusive or-and logic circuit

Also Published As

Publication number Publication date
DE3242234A1 (de) 1983-05-26
JPS5884445A (ja) 1983-05-20
US4586169A (en) 1986-04-29

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee