DE3072001D1 - Diagnostic circuitry in a data processor - Google Patents

Diagnostic circuitry in a data processor

Info

Publication number
DE3072001D1
DE3072001D1 DE8181900284T DE3072001T DE3072001D1 DE 3072001 D1 DE3072001 D1 DE 3072001D1 DE 8181900284 T DE8181900284 T DE 8181900284T DE 3072001 T DE3072001 T DE 3072001T DE 3072001 D1 DE3072001 D1 DE 3072001D1
Authority
DE
Germany
Prior art keywords
log
addresses
control store
diagnostic circuitry
data processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181900284T
Other languages
English (en)
Inventor
Rolfe Douglas Armstrong
Dennis Allen Walsh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR International Inc
Original Assignee
NCR Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR Corp filed Critical NCR Corp
Application granted granted Critical
Publication of DE3072001D1 publication Critical patent/DE3072001D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/3476—Data logging
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/348—Circuit details, i.e. tracer hardware

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Advance Control (AREA)
DE8181900284T 1979-12-27 1980-12-18 Diagnostic circuitry in a data processor Expired DE3072001D1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/107,735 US4315313A (en) 1979-12-27 1979-12-27 Diagnostic circuitry in a data processor
PCT/US1980/001684 WO1981001891A1 (en) 1979-12-27 1980-12-18 Diagnostic circuitry in a data processor

Publications (1)

Publication Number Publication Date
DE3072001D1 true DE3072001D1 (en) 1987-09-03

Family

ID=22318184

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8181900284T Expired DE3072001D1 (en) 1979-12-27 1980-12-18 Diagnostic circuitry in a data processor

Country Status (6)

Country Link
US (1) US4315313A (de)
EP (1) EP0042422B1 (de)
JP (1) JPS56501740A (de)
CA (1) CA1145852A (de)
DE (1) DE3072001D1 (de)
WO (1) WO1981001891A1 (de)

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US4495565A (en) * 1981-11-09 1985-01-22 At&T Bell Laboratories Computer memory address matcher and process
JPS5886648A (ja) * 1981-11-18 1983-05-24 Mitsubishi Electric Corp トレ−ス装置
JPS58201154A (ja) * 1982-05-19 1983-11-22 Nissan Motor Co Ltd アンチスキッド制御装置用マイクロコンピュータのモード監視制御装置
US4870644A (en) * 1982-09-21 1989-09-26 Xerox Corporation Control crash diagnostic strategy and RAM display
DE3241412A1 (de) * 1982-11-09 1984-05-10 Siemens AG, 1000 Berlin und 8000 München Vorrichtung zum testen eines hochintegrierten mikroprogramm-gesteuerten elektronischen bauteiles
US5070448A (en) * 1982-12-09 1991-12-03 International Business Machines Coproration Method for testing a microprogrammed input/output interface using steal techniques
US4606024A (en) * 1982-12-20 1986-08-12 At&T Bell Laboratories Hierarchical diagnostic testing arrangement for a data processing system having operationally interdependent circuit boards
JPS59133610A (ja) * 1983-01-19 1984-08-01 Omron Tateisi Electronics Co プログラマブルコントロ−ラ
JPS59216256A (ja) * 1983-05-24 1984-12-06 Iwatsu Electric Co Ltd マイクロプロセツサの動作解析装置
US4800486A (en) * 1983-09-29 1989-01-24 Tandem Computers Incorporated Multiple data patch CPU architecture
US4636967A (en) * 1983-10-24 1987-01-13 Honeywell Inc. Monitor circuit
US4878168A (en) * 1984-03-30 1989-10-31 International Business Machines Corporation Bidirectional serial test bus device adapted for control processing unit using parallel information transfer bus
US4692897A (en) * 1984-09-04 1987-09-08 Gte Communication Systems Corporation Arrangement for dynamic range checking or matching for digital values in a software system
US4679194A (en) * 1984-10-01 1987-07-07 Motorola, Inc. Load double test instruction
US4641305A (en) * 1984-10-19 1987-02-03 Honeywell Information Systems Inc. Control store memory read error resiliency method and apparatus
JPS61212653A (ja) * 1985-03-18 1986-09-20 Honda Motor Co Ltd 内燃エンジンの電子制御装置
US4751639A (en) * 1985-06-24 1988-06-14 Ncr Corporation Virtual command rollback in a fault tolerant data processing system
US4920538A (en) * 1985-06-28 1990-04-24 International Business Machines Corporation Method of checking the execution of microcode sequences
JPH07120299B2 (ja) * 1986-01-10 1995-12-20 株式会社日立製作所 マルチプロセッサシステムの試験方法
JPS62257543A (ja) * 1986-04-30 1987-11-10 Toshiba Corp マイクロプログラム活性化状態検査回路
US4797817A (en) * 1986-12-10 1989-01-10 Ncr Corporation Single cycle store operations in a virtual memory
US5193205A (en) * 1988-03-01 1993-03-09 Mitsubishi Denki Kabushiki Kaisha Pipeline processor, with return address stack storing only pre-return processed address for judging validity and correction of unprocessed address
US4996641A (en) * 1988-04-15 1991-02-26 Motorola, Inc. Diagnostic mode for a cache
US5263143A (en) * 1988-07-11 1993-11-16 Star Semiconductor Corporation Real time probe device for internals of signal processor
US5287511A (en) * 1988-07-11 1994-02-15 Star Semiconductor Corporation Architectures and methods for dividing processing tasks into tasks for a programmable real time signal processor and tasks for a decision making microprocessor interfacing therewith
JPH02216545A (ja) * 1989-02-17 1990-08-29 Nec Corp 実行履歴記憶装置
US5157781A (en) * 1990-01-02 1992-10-20 Motorola, Inc. Data processor test architecture
US6804725B1 (en) * 1996-08-30 2004-10-12 Texas Instruments Incorporated IC with state machine controlled linking module
US5991899A (en) * 1997-03-21 1999-11-23 Samsung Electronics Co., Ltd. Method and apparatus for a real-time diagnostic tool using a non-intrusive trace technique
US7284016B2 (en) 2002-12-03 2007-10-16 Emc Corporation Client-server protocol for directory access of snapshot file systems in a storage system

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL267514A (de) * 1960-07-25
US3396371A (en) * 1964-09-29 1968-08-06 Ibm Controller for data processing system
US3540003A (en) * 1968-06-10 1970-11-10 Ibm Computer monitoring system
US3659272A (en) * 1970-05-13 1972-04-25 Burroughs Corp Digital computer with a program-trace facility
US3696340A (en) * 1970-11-09 1972-10-03 Tokyo Shibaura Electric Co Microprogram execution control for fault diagnosis
US3736566A (en) * 1971-08-18 1973-05-29 Ibm Central processing unit with hardware controlled checkpoint and retry facilities
US3771131A (en) * 1972-04-17 1973-11-06 Xerox Corp Operating condition monitoring in digital computers
US3889243A (en) * 1973-10-18 1975-06-10 Ibm Stack mechanism for a data processor
US3937938A (en) * 1974-06-19 1976-02-10 Action Communication Systems, Inc. Method and apparatus for assisting in debugging of a digital computer program
US3935563A (en) * 1975-01-24 1976-01-27 The United States Of America As Represented By The Secretary Of The Navy Computer footprint file
US4016543A (en) * 1975-02-10 1977-04-05 Formation, Inc. Processor address recall system
US4176394A (en) * 1977-06-13 1979-11-27 Sperry Rand Corporation Apparatus for maintaining a history of the most recently executed instructions in a digital computer
DE2737350C2 (de) * 1977-08-18 1979-08-23 Siemens Ag, 1000 Berlin Und 8000 Muenchen Einrichtung zur Fehlerbehandlung in einer mikroprogrammgesteuerten Datenverarbeitungsanlage

Also Published As

Publication number Publication date
EP0042422A4 (de) 1985-09-02
CA1145852A (en) 1983-05-03
JPS56501740A (de) 1981-11-26
WO1981001891A1 (en) 1981-07-09
EP0042422A1 (de) 1981-12-30
US4315313A (en) 1982-02-09
EP0042422B1 (de) 1987-07-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NCR INTERNATIONAL INC., DAYTON, OHIO, US

8328 Change in the person/name/address of the agent

Free format text: KAHLER, K., DIPL.-ING., 8948 MINDELHEIM KAECK, J., DIPL.-ING. DIPL.-WIRTSCH.-ING., 8910 LANDSBERG FIENER, J., PAT.-ANWAELTE, 8948 MINDELHEIM

8320 Willingness to grant licences declared (paragraph 23)
8327 Change in the person/name/address of the patent owner

Owner name: AT&T GLOBAL INFORMATION SOLUTIONS INTERNATIONAL IN

8339 Ceased/non-payment of the annual fee