DE2734008C3 - Schaltungsanordnung zur Verminderung der am Ausgangsanschluß einer Informationsignalquelle auftretenden positiven Rauscheffekte - Google Patents
Schaltungsanordnung zur Verminderung der am Ausgangsanschluß einer Informationsignalquelle auftretenden positiven RauscheffekteInfo
- Publication number
- DE2734008C3 DE2734008C3 DE2734008A DE2734008A DE2734008C3 DE 2734008 C3 DE2734008 C3 DE 2734008C3 DE 2734008 A DE2734008 A DE 2734008A DE 2734008 A DE2734008 A DE 2734008A DE 2734008 C3 DE2734008 C3 DE 2734008C3
- Authority
- DE
- Germany
- Prior art keywords
- clock
- transistor
- during
- field effect
- conduction path
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000000694 effects Effects 0.000 title claims description 14
- 230000005669 field effect Effects 0.000 claims description 64
- 239000003990 capacitor Substances 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 5
- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- 150000004706 metal oxides Chemical class 0.000 claims description 3
- 230000000737 periodic effect Effects 0.000 claims 1
- 230000035945 sensitivity Effects 0.000 claims 1
- 238000011156 evaluation Methods 0.000 description 12
- 230000016507 interphase Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000004898 kneading Methods 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
- H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/717,713 US4042833A (en) | 1976-08-25 | 1976-08-25 | In-between phase clamping circuit to reduce the effects of positive noise |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| DE2734008A1 DE2734008A1 (de) | 1978-03-09 |
| DE2734008B2 DE2734008B2 (de) | 1981-01-15 |
| DE2734008C3 true DE2734008C3 (de) | 1981-10-29 |
Family
ID=24883159
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE2734008A Expired DE2734008C3 (de) | 1976-08-25 | 1977-07-28 | Schaltungsanordnung zur Verminderung der am Ausgangsanschluß einer Informationsignalquelle auftretenden positiven Rauscheffekte |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US4042833A (enExample) |
| JP (1) | JPS5327355A (enExample) |
| DE (1) | DE2734008C3 (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4100430A (en) * | 1977-03-07 | 1978-07-11 | Rockwell International Corporation | Multi-phase and gate |
| JPS5936405A (ja) * | 1982-08-23 | 1984-02-28 | Mitsubishi Electric Corp | 入力増幅回路 |
| US4585958A (en) * | 1983-12-30 | 1986-04-29 | At&T Bell Laboratories | IC chip with noise suppression circuit |
| IT1218845B (it) * | 1984-03-30 | 1990-04-24 | Ates Componenti Elettron | Circuito di interfaccia attenuatore di rumore per generatori di segnali di temporizzazione a due fasi non sovrapposte |
| JPH04218364A (ja) * | 1990-04-27 | 1992-08-07 | Mitsubishi Petrochem Co Ltd | シュードモナス属微生物の培養方法 |
| JP4170354B2 (ja) * | 2000-11-22 | 2008-10-22 | 株式会社 日立ディスプレイズ | 表示装置 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3567968A (en) * | 1967-02-27 | 1971-03-02 | North American Rockwell | Gating system for reducing the effects of positive feedback noise in multiphase gating devices |
| US3579275A (en) * | 1969-01-07 | 1971-05-18 | North American Rockwell | Isolation circuit for gating devices |
| US3631261A (en) * | 1970-07-06 | 1971-12-28 | North American Rockwell | Compact layout for multiphase shift register |
| US3601627A (en) * | 1970-07-13 | 1971-08-24 | North American Rockwell | Multiple phase logic gates for shift register stages |
| US3646369A (en) * | 1970-08-28 | 1972-02-29 | North American Rockwell | Multiphase field effect transistor dc driver |
| US3708688A (en) * | 1971-06-15 | 1973-01-02 | Ibm | Circuit for eliminating spurious outputs due to interelectrode capacitance in driver igfet circuits |
| CA934015A (en) * | 1971-09-30 | 1973-09-18 | K. Au Kenneth | Field effect transistor driver circuit |
| US3774053A (en) * | 1971-12-17 | 1973-11-20 | North American Rockwell | Clamping arrangement for reducing the effects of noise in field effect transistor logic circuits |
| JPS5333017B2 (enExample) * | 1972-09-30 | 1978-09-12 | ||
| JPS4971859A (enExample) * | 1972-11-11 | 1974-07-11 |
-
1976
- 1976-08-25 US US05/717,713 patent/US4042833A/en not_active Expired - Lifetime
-
1977
- 1977-07-28 DE DE2734008A patent/DE2734008C3/de not_active Expired
- 1977-08-04 JP JP9408477A patent/JPS5327355A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| DE2734008B2 (de) | 1981-01-15 |
| US4042833A (en) | 1977-08-16 |
| JPS5728978B2 (enExample) | 1982-06-19 |
| DE2734008A1 (de) | 1978-03-09 |
| JPS5327355A (en) | 1978-03-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| OAP | Request for examination filed | ||
| OD | Request for examination | ||
| C3 | Grant after two publication steps (3rd publication) |