DE2733108A1 - Schaltungsanordnung zur erzeugung von normimpulssequenzen - Google Patents

Schaltungsanordnung zur erzeugung von normimpulssequenzen

Info

Publication number
DE2733108A1
DE2733108A1 DE19772733108 DE2733108A DE2733108A1 DE 2733108 A1 DE2733108 A1 DE 2733108A1 DE 19772733108 DE19772733108 DE 19772733108 DE 2733108 A DE2733108 A DE 2733108A DE 2733108 A1 DE2733108 A1 DE 2733108A1
Authority
DE
Germany
Prior art keywords
counter
cycle
circuit
circuit arrangement
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19772733108
Other languages
German (de)
English (en)
Inventor
Annie Raynaud
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Inc
Original Assignee
Nokia Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Inc filed Critical Nokia Inc
Publication of DE2733108A1 publication Critical patent/DE2733108A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M19/00Current supply arrangements for telephone systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/62Performing operations exclusively by counting total number of pulses ; Multiplication, division or derived operations using combined denominational and incremental processing by counters, i.e. without column shift
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H03K5/1506Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages
    • H03K5/15066Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages using bistable devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Computing Systems (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Electric Clocks (AREA)
  • Electronic Switches (AREA)
  • Meter Arrangements (AREA)
DE19772733108 1976-07-29 1977-07-22 Schaltungsanordnung zur erzeugung von normimpulssequenzen Withdrawn DE2733108A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7623178A FR2360213A1 (fr) 1976-07-29 1976-07-29 Systeme de distribution d'impulsions calibrees

Publications (1)

Publication Number Publication Date
DE2733108A1 true DE2733108A1 (de) 1978-02-02

Family

ID=9176325

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19772733108 Withdrawn DE2733108A1 (de) 1976-07-29 1977-07-22 Schaltungsanordnung zur erzeugung von normimpulssequenzen

Country Status (8)

Country Link
BE (1) BE856763A (https=)
DE (1) DE2733108A1 (https=)
FR (1) FR2360213A1 (https=)
GB (1) GB1590892A (https=)
IT (1) IT1081642B (https=)
NL (1) NL7708455A (https=)
PT (1) PT66860B (https=)
SE (1) SE413574B (https=)

Also Published As

Publication number Publication date
IT1081642B (it) 1985-05-21
FR2360213B1 (https=) 1981-12-11
PT66860B (fr) 1978-12-29
PT66860A (fr) 1977-08-01
FR2360213A1 (fr) 1978-02-24
SE413574B (sv) 1980-06-02
SE7708614L (sv) 1978-01-30
BE856763A (fr) 1978-01-13
GB1590892A (en) 1981-06-10
NL7708455A (nl) 1978-01-31

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Legal Events

Date Code Title Description
8139 Disposal/non-payment of the annual fee