DE2702047C3 - Schaltungsanordnung zur Wiedergewinnung von Daten - Google Patents

Schaltungsanordnung zur Wiedergewinnung von Daten

Info

Publication number
DE2702047C3
DE2702047C3 DE2702047A DE2702047A DE2702047C3 DE 2702047 C3 DE2702047 C3 DE 2702047C3 DE 2702047 A DE2702047 A DE 2702047A DE 2702047 A DE2702047 A DE 2702047A DE 2702047 C3 DE2702047 C3 DE 2702047C3
Authority
DE
Germany
Prior art keywords
pulse
input
input data
pulses
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2702047A
Other languages
German (de)
English (en)
Other versions
DE2702047A1 (de
DE2702047B2 (de
Inventor
Bruce James Collegeville Pa. Rogers (V.St.A.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Sperry Rand Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sperry Rand Corp filed Critical Sperry Rand Corp
Publication of DE2702047A1 publication Critical patent/DE2702047A1/de
Publication of DE2702047B2 publication Critical patent/DE2702047B2/de
Application granted granted Critical
Publication of DE2702047C3 publication Critical patent/DE2702047C3/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/191—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using at least two different signals from the frequency divider or the counter for determining the time difference
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/20—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a harmonic phase-locked loop, i.e. a loop which can be locked to one of a number of harmonically related frequencies applied to it

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
DE2702047A 1976-01-26 1977-01-19 Schaltungsanordnung zur Wiedergewinnung von Daten Expired DE2702047C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/652,369 US4017806A (en) 1976-01-26 1976-01-26 Phase locked oscillator

Publications (3)

Publication Number Publication Date
DE2702047A1 DE2702047A1 (de) 1977-08-04
DE2702047B2 DE2702047B2 (de) 1979-09-06
DE2702047C3 true DE2702047C3 (de) 1980-07-03

Family

ID=24616578

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2702047A Expired DE2702047C3 (de) 1976-01-26 1977-01-19 Schaltungsanordnung zur Wiedergewinnung von Daten

Country Status (7)

Country Link
US (1) US4017806A (enExample)
JP (1) JPS5291634A (enExample)
CA (1) CA1060960A (enExample)
DE (1) DE2702047C3 (enExample)
FR (1) FR2339289A1 (enExample)
GB (1) GB1565244A (enExample)
IT (1) IT1065846B (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2748075C3 (de) * 1977-10-26 1980-08-07 Siemens Ag, 1000 Berlin Und 8000 Muenchen Phasenregelkreis
DE2912406A1 (de) * 1978-03-31 1979-10-18 Citizen Watch Co Ltd Frequenzteilersystem
DE3006340C2 (de) * 1979-02-21 1986-09-18 Sharp K.K., Osaka Abtastzeitsteuerungsschaltung für ein Kassettenmagnetband-Datenwiedergabegerät
BR8004455A (pt) * 1979-07-19 1981-01-27 Exxon Research Engineering Co Circuito separador de dados e circuito para emprego na recuperacao de um sinal de relogio de um sinal codificado de dados dos
JPS5935218B2 (ja) * 1979-12-29 1984-08-27 クラリオン株式会社 Ｐｌｌ回路
US4424497A (en) 1981-04-30 1984-01-03 Monolithic Systems Corporation System for phase locking clock signals to a frequency encoded data stream
JPS5850827A (ja) * 1981-09-08 1983-03-25 Fujitsu Ltd フェーズ・ロック・ループ回路
US4549148A (en) * 1983-12-16 1985-10-22 International Standard Electric Corporation Pulse corrector for phase comparator inputs
US4527276A (en) * 1984-01-16 1985-07-02 The United States Of America As Represented By The Secretary Of The Army Digital pulse position modulation communications system with threshold extension
IT1197969B (it) * 1986-11-12 1988-12-21 Honeywell Inf Systems Circuito ad aggancio di fase
US4750193A (en) * 1987-04-20 1988-06-07 International Business Machines Corporation Phase-locked data detector
US4818950A (en) * 1987-04-24 1989-04-04 Ncr Corporation Low jitter phase-locked loop
US5124669A (en) * 1990-09-18 1992-06-23 Silicon Systems, Inc. One-shot circuit for use in a PLL clock recovery circuit
US5302916A (en) * 1992-12-21 1994-04-12 At&T Bell Laboratories Wide range digital frequency detector
US5512860A (en) * 1994-12-02 1996-04-30 Pmc-Sierra, Inc. Clock recovery phase locked loop control using clock difference detection and forced low frequency startup
JP3024614B2 (ja) * 1997-10-24 2000-03-21 日本電気株式会社 ばらつき補償技術による半導体集積回路
FR2868891B1 (fr) * 2004-04-08 2006-07-07 Eads Telecom Soc Par Actions S Boucle a asservissement de phase a demi-pas

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3731220A (en) * 1972-05-30 1973-05-01 Honeywell Inf Systems Phase locked oscillator for use with variable speed data source
US3898574A (en) * 1974-01-02 1975-08-05 Honeywell Inf Systems Information detection apparatus having a digital tracking oscillator
GB1456453A (en) * 1974-01-31 1976-11-24 Ibm Phase locked oscillators

Also Published As

Publication number Publication date
FR2339289A1 (fr) 1977-08-19
CA1060960A (en) 1979-08-21
DE2702047A1 (de) 1977-08-04
DE2702047B2 (de) 1979-09-06
IT1065846B (it) 1985-03-04
GB1565244A (en) 1980-04-16
FR2339289B1 (enExample) 1982-02-12
US4017806A (en) 1977-04-12
JPS5291634A (en) 1977-08-02

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
8339 Ceased/non-payment of the annual fee