DE2645638C2 - Phasendetektor in einer phasenstarren Schleife - Google Patents

Phasendetektor in einer phasenstarren Schleife

Info

Publication number
DE2645638C2
DE2645638C2 DE2645638A DE2645638A DE2645638C2 DE 2645638 C2 DE2645638 C2 DE 2645638C2 DE 2645638 A DE2645638 A DE 2645638A DE 2645638 A DE2645638 A DE 2645638A DE 2645638 C2 DE2645638 C2 DE 2645638C2
Authority
DE
Germany
Prior art keywords
pulse
pulses
state
flip
variable width
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2645638A
Other languages
German (de)
English (en)
Other versions
DE2645638A1 (de
Inventor
Jules Arthur Maple Glen Pa. Eibner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Sperry Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sperry Corp filed Critical Sperry Corp
Publication of DE2645638A1 publication Critical patent/DE2645638A1/de
Application granted granted Critical
Publication of DE2645638C2 publication Critical patent/DE2645638C2/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K11/00—Transforming types of modulations, e.g. position-modulated pulses into duration-modulated pulses
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
DE2645638A 1975-10-31 1976-10-08 Phasendetektor in einer phasenstarren Schleife Expired DE2645638C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/627,576 US3986125A (en) 1975-10-31 1975-10-31 Phase detector having a 360 linear range for periodic and aperiodic input pulse streams

Publications (2)

Publication Number Publication Date
DE2645638A1 DE2645638A1 (de) 1977-05-05
DE2645638C2 true DE2645638C2 (de) 1983-07-21

Family

ID=24515220

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2645638A Expired DE2645638C2 (de) 1975-10-31 1976-10-08 Phasendetektor in einer phasenstarren Schleife

Country Status (7)

Country Link
US (1) US3986125A (enExample)
JP (1) JPS5257861A (enExample)
CA (1) CA1054232A (enExample)
DE (1) DE2645638C2 (enExample)
FR (1) FR2330012A1 (enExample)
GB (1) GB1561898A (enExample)
IT (1) IT1107708B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3733554A1 (de) * 1986-10-07 1988-04-21 Western Digital Corp Pll-verzoegerungsschaltung

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4222013A (en) * 1978-11-24 1980-09-09 Bowers Thomas E Phase locked loop for deriving clock signal from aperiodic data signal
GB2071943B (en) * 1980-03-10 1984-06-27 Control Data Corp Delay lock loop
JPS5714725A (en) * 1980-07-02 1982-01-26 Hitachi Ltd Digital phase detector
US4371974A (en) * 1981-02-25 1983-02-01 Rockwell International Corporation NRZ Data phase detector
US4380815A (en) * 1981-02-25 1983-04-19 Rockwell International Corporation Simplified NRZ data phase detector with expanded measuring interval
DE3121970C2 (de) * 1981-06-03 1986-06-26 ANT Nachrichtentechnik GmbH, 7150 Backnang Digitaler Phasendiskriminator
US4520319A (en) * 1982-09-30 1985-05-28 Westinghouse Electric Corp. Electronic phase detector having an output which is proportional to the phase difference between two data signals
US4568881A (en) * 1983-05-03 1986-02-04 Magnetic Peripherals Inc. Phase comparator and data separator
JPS59221122A (ja) * 1983-05-31 1984-12-12 Fujitsu Ltd 位相比較方式
JPH0763148B2 (ja) * 1984-04-18 1995-07-05 松下電器産業株式会社 位相同期回路
US4583053A (en) * 1984-06-11 1986-04-15 Signetics Corporation Phase detector insensitive to missing pulses
JPS6129219A (ja) * 1984-07-19 1986-02-10 Matsushita Electric Ind Co Ltd 位相同期回路
US4922141A (en) * 1986-10-07 1990-05-01 Western Digital Corporation Phase-locked loop delay line
DE3643947C2 (de) * 1986-12-22 1995-11-02 Vdo Schindling Schaltungsanordnung zum Abgleich der Frequenz eines Oszillators
US4849704A (en) * 1987-04-15 1989-07-18 Westinghouse Electric Corp. Duty cycle independent phase detector
US4754225A (en) * 1987-07-06 1988-06-28 Magnetic Peripherals Inc. Phase comparator insensitive to clock asymmetry
JP2508180Y2 (ja) * 1988-09-22 1996-08-21 アルプス電気株式会社 直接変調ｐｌｌ回路
US4864252A (en) * 1988-09-26 1989-09-05 Motorola, Inc. Sample-and-hold phase detector for use in a phase locked loop
ATE121239T1 (de) * 1989-06-15 1995-04-15 Siemens Ag Schaltungsanordnung zur phasenrichtigen regenerierung eines taktsignals.
US5640523A (en) * 1994-09-02 1997-06-17 Cypress Semiconductor Corporation Method and apparatus for a pulsed tri-state phase detector for reduced jitter clock recovery
US7372928B1 (en) 2002-11-15 2008-05-13 Cypress Semiconductor Corporation Method and system of cycle slip framing in a deserializer
DE102008060663A1 (de) * 2008-12-08 2010-06-10 KROHNE Meßtechnik GmbH & Co. KG Schaltungsanordnung zur Erzeugung kurzer elektrischer Impulse

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3393367A (en) * 1965-12-08 1968-07-16 Rca Corp Circuit for generating two consecutive same-duration pulses, each on separate outputterminals, regardless of triggering-pulse duration
US3701039A (en) * 1968-10-28 1972-10-24 Ibm Random binary data signal frequency and phase compensation circuit
US3619793A (en) * 1969-11-05 1971-11-09 Atlantic Richfield Co Digital waveform generator with adjustable time shift and automatic phase control
US3599110A (en) * 1970-03-31 1971-08-10 Ibm Self-clocking system having a variable frequency oscillator locked to leading edge of data and clock
GB1364637A (en) * 1970-12-15 1974-08-21 Aisin Seiki Method of and apparatus for indicating the lower and higher
US3634869A (en) * 1970-12-29 1972-01-11 Chia Ying Hsueh Interpulse time interval detection circuit
US3714463A (en) * 1971-01-04 1973-01-30 Motorola Inc Digital frequency and/or phase detector charge pump
US3714589A (en) * 1971-12-01 1973-01-30 R Lewis Digitally controlled phase shifter
JPS5547039B2 (enExample) * 1972-02-17 1980-11-27
US3813604A (en) * 1972-10-04 1974-05-28 Marconi Co Canada Digital discriminator
FR2226667B3 (enExample) * 1973-04-18 1978-05-05 Siemens Ag
US3922610A (en) * 1974-01-28 1975-11-25 Basf Ag Pulse anti coincidence methods and circuits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3733554A1 (de) * 1986-10-07 1988-04-21 Western Digital Corp Pll-verzoegerungsschaltung

Also Published As

Publication number Publication date
CA1054232A (en) 1979-05-08
DE2645638A1 (de) 1977-05-05
US3986125A (en) 1976-10-12
FR2330012A1 (fr) 1977-05-27
FR2330012B1 (enExample) 1982-09-17
JPS5257861A (en) 1977-05-12
GB1561898A (en) 1980-03-05
IT1107708B (it) 1985-11-25

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Legal Events

Date Code Title Description
OD Request for examination
D2 Grant after examination
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: DERZEIT KEIN VERTRETER BESTELLT

8339 Ceased/non-payment of the annual fee