DE2528066A1 - Digitale datenverarbeitungsschaltung - Google Patents
Digitale datenverarbeitungsschaltungInfo
- Publication number
- DE2528066A1 DE2528066A1 DE19752528066 DE2528066A DE2528066A1 DE 2528066 A1 DE2528066 A1 DE 2528066A1 DE 19752528066 DE19752528066 DE 19752528066 DE 2528066 A DE2528066 A DE 2528066A DE 2528066 A1 DE2528066 A1 DE 2528066A1
- Authority
- DE
- Germany
- Prior art keywords
- circuit
- precharge
- node
- mos
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000872 buffer Substances 0.000 claims description 11
- 230000006870 function Effects 0.000 claims description 4
- 238000013500 data storage Methods 0.000 claims 4
- 239000004020 conductor Substances 0.000 description 30
- 230000005669 field effect Effects 0.000 description 22
- 230000008878 coupling Effects 0.000 description 11
- 238000010168 coupling process Methods 0.000 description 11
- 238000005859 coupling reaction Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 11
- 238000007781 pre-processing Methods 0.000 description 8
- 238000002360 preparation method Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 230000003466 anti-cipated effect Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000013479 data entry Methods 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000036316 preload Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
- G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
- G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Read Only Memory (AREA)
- Static Random-Access Memory (AREA)
- Memory System (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/485,191 US3942162A (en) | 1974-07-01 | 1974-07-01 | Pre-conditioning circuits for MOS integrated circuits |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE2528066A1 true DE2528066A1 (de) | 1976-01-22 |
Family
ID=23927249
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19752528066 Pending DE2528066A1 (de) | 1974-07-01 | 1975-06-24 | Digitale datenverarbeitungsschaltung |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US3942162A (cg-RX-API-DMAC7.html) |
| JP (1) | JPS5824879B2 (cg-RX-API-DMAC7.html) |
| DE (1) | DE2528066A1 (cg-RX-API-DMAC7.html) |
| FR (1) | FR2277411A1 (cg-RX-API-DMAC7.html) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4006457A (en) * | 1975-02-18 | 1977-02-01 | Motorola, Inc. | Logic circuitry for selection of dedicated registers |
| JPS52146274A (en) * | 1976-05-31 | 1977-12-05 | Toshiba Corp | Output circuit |
| US4100430A (en) * | 1977-03-07 | 1978-07-11 | Rockwell International Corporation | Multi-phase and gate |
| US4291393A (en) * | 1980-02-11 | 1981-09-22 | Mostek Corporation | Active refresh circuit for dynamic MOS circuits |
| JPS5837636B2 (ja) * | 1980-07-31 | 1983-08-17 | 富士通株式会社 | 半導体記憶装置 |
| US4330722A (en) * | 1980-08-18 | 1982-05-18 | Bell Telephone Laboratories, Incorporated | Clocked IGFET logic circuit |
| US4405996A (en) * | 1981-02-06 | 1983-09-20 | Rca Corporation | Precharge with power conservation |
| JPS5968889A (ja) * | 1982-10-08 | 1984-04-18 | Toshiba Corp | 半導体記憶装置 |
| JPS59221891A (ja) * | 1983-05-31 | 1984-12-13 | Toshiba Corp | スタテイツク型半導体記憶装置 |
| DE3328387A1 (de) * | 1983-08-05 | 1985-02-14 | Siemens AG, 1000 Berlin und 8000 München | Schaltverfahren fuer fernmeldevermittlungsanlagen, insbesondere fernsprechvermittlungsanlagen, mit informationsverarbeitenden schalteinrichtungen und mit ihnen zusammenarbeitenden arbeitsspeichern |
| US4712194A (en) * | 1984-06-08 | 1987-12-08 | Matsushita Electric Industrial Co., Ltd. | Static random access memory |
| JPS6124091A (ja) * | 1984-07-12 | 1986-02-01 | Nec Corp | メモリ回路 |
| US4638462A (en) * | 1985-01-31 | 1987-01-20 | International Business Machines Corporation | Self-timed precharge circuit |
| JPS63263689A (ja) * | 1987-04-20 | 1988-10-31 | Mitsubishi Electric Corp | 半導体記憶装置 |
| EP0426597B1 (en) * | 1989-10-30 | 1995-11-08 | International Business Machines Corporation | Bit decode scheme for memory arrays |
| US5022010A (en) * | 1989-10-30 | 1991-06-04 | International Business Machines Corporation | Word decoder for a memory array |
| KR101033490B1 (ko) * | 2009-11-30 | 2011-05-09 | 주식회사 하이닉스반도체 | 패드를 선택적으로 이용하는 반도체 메모리 장치 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3786437A (en) * | 1972-01-03 | 1974-01-15 | Honeywell Inf Systems | Random access memory system utilizing an inverting cell concept |
| US3801964A (en) * | 1972-02-24 | 1974-04-02 | Advanced Memory Sys Inc | Semiconductor memory with address decoding |
| US3771147A (en) * | 1972-12-04 | 1973-11-06 | Bell Telephone Labor Inc | Igfet memory system |
-
1974
- 1974-07-01 US US05/485,191 patent/US3942162A/en not_active Expired - Lifetime
-
1975
- 1975-06-24 DE DE19752528066 patent/DE2528066A1/de active Pending
- 1975-06-30 FR FR7520520A patent/FR2277411A1/fr not_active Withdrawn
- 1975-07-01 JP JP50080578A patent/JPS5824879B2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| FR2277411A1 (fr) | 1976-01-30 |
| US3942162A (en) | 1976-03-02 |
| JPS5824879B2 (ja) | 1983-05-24 |
| JPS5125940A (cg-RX-API-DMAC7.html) | 1976-03-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| OHJ | Non-payment of the annual fee |