DE2525529B2 - Halbleiteranordnung mit komplementaeren transistorstrukturen und verfahren zu ihrer herstellung - Google Patents

Halbleiteranordnung mit komplementaeren transistorstrukturen und verfahren zu ihrer herstellung

Info

Publication number
DE2525529B2
DE2525529B2 DE19752525529 DE2525529A DE2525529B2 DE 2525529 B2 DE2525529 B2 DE 2525529B2 DE 19752525529 DE19752525529 DE 19752525529 DE 2525529 A DE2525529 A DE 2525529A DE 2525529 B2 DE2525529 B2 DE 2525529B2
Authority
DE
Germany
Prior art keywords
layer
epitaxial layer
zone
semiconductor
conductivity type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19752525529
Other languages
German (de)
English (en)
Other versions
DE2525529A1 (de
Inventor
Johannes Arnoldus Eversteijn Franciscus Cornells Eindhoven Appels (Niederlande)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE2525529A1 publication Critical patent/DE2525529A1/de
Publication of DE2525529B2 publication Critical patent/DE2525529B2/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/67—Complementary BJTs
    • H10D84/673—Vertical complementary BJTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76283—Lateral isolation by refilling of trenches with dielectric material

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE19752525529 1974-06-18 1975-06-07 Halbleiteranordnung mit komplementaeren transistorstrukturen und verfahren zu ihrer herstellung Withdrawn DE2525529B2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7408110A NL7408110A (nl) 1974-06-18 1974-06-18 Halfgeleiderinrichting met complementaire tran- sistorstrukturen en werkwijze ter vervaardiging daarvan.

Publications (2)

Publication Number Publication Date
DE2525529A1 DE2525529A1 (de) 1976-01-08
DE2525529B2 true DE2525529B2 (de) 1977-08-04

Family

ID=19821569

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19752525529 Withdrawn DE2525529B2 (de) 1974-06-18 1975-06-07 Halbleiteranordnung mit komplementaeren transistorstrukturen und verfahren zu ihrer herstellung

Country Status (13)

Country Link
JP (1) JPS5112778A (enrdf_load_html_response)
AU (1) AU499052B2 (enrdf_load_html_response)
BE (1) BE830286A (enrdf_load_html_response)
BR (1) BR7503777A (enrdf_load_html_response)
CA (1) CA1029134A (enrdf_load_html_response)
CH (1) CH588166A5 (enrdf_load_html_response)
DE (1) DE2525529B2 (enrdf_load_html_response)
ES (1) ES438593A1 (enrdf_load_html_response)
FR (1) FR2275884A1 (enrdf_load_html_response)
GB (1) GB1505103A (enrdf_load_html_response)
IT (1) IT1046053B (enrdf_load_html_response)
NL (1) NL7408110A (enrdf_load_html_response)
SE (1) SE407996B (enrdf_load_html_response)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7710164A (nl) * 1977-09-16 1979-03-20 Philips Nv Werkwijze ter behandeling van een eenkristal- lijn lichaam.
US4159915A (en) * 1977-10-25 1979-07-03 International Business Machines Corporation Method for fabrication vertical NPN and PNP structures utilizing ion-implantation
US4232328A (en) * 1978-12-20 1980-11-04 Bell Telephone Laboratories, Incorporated Dielectrically-isolated integrated circuit complementary transistors for high voltage use
GB2060252B (en) * 1979-09-17 1984-02-22 Nippon Telegraph & Telephone Mutually isolated complementary semiconductor elements
JPS57204898A (en) * 1981-06-02 1982-12-15 Saito Masayasu Pump for vessel for dividing liquid little by little
JP2531824Y2 (ja) * 1987-02-13 1997-04-09 株式会社 神崎高級工機製作所 油圧クラツチ式変速装置
JPS63142451U (enrdf_load_html_response) * 1987-03-12 1988-09-20
US5070382A (en) * 1989-08-18 1991-12-03 Motorola, Inc. Semiconductor structure for high power integrated circuits
US7076124B2 (en) * 2002-12-20 2006-07-11 Avago Technologies, Ltd. Integrated multichannel laser driver and photodetector receiver
EP4372792A1 (en) * 2022-11-16 2024-05-22 Infineon Technologies Dresden GmbH & Co . KG Semiconductor device

Also Published As

Publication number Publication date
FR2275884A1 (fr) 1976-01-16
SE7506878L (sv) 1975-12-19
CH588166A5 (enrdf_load_html_response) 1977-05-31
AU499052B2 (en) 1979-04-05
DE2525529A1 (de) 1976-01-08
BR7503777A (pt) 1976-07-06
JPS5247319B2 (enrdf_load_html_response) 1977-12-01
NL7408110A (nl) 1975-12-22
FR2275884B1 (enrdf_load_html_response) 1980-10-24
IT1046053B (it) 1980-06-30
CA1029134A (en) 1978-04-04
ES438593A1 (es) 1977-01-16
BE830286A (fr) 1975-12-16
SE407996B (sv) 1979-04-30
AU8214975A (en) 1976-12-23
GB1505103A (en) 1978-03-22
JPS5112778A (en) 1976-01-31

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Legal Events

Date Code Title Description
8239 Disposal/non-payment of the annual fee