DE2438109A1 - Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte halbleiteranordnung - Google Patents

Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte halbleiteranordnung

Info

Publication number
DE2438109A1
DE2438109A1 DE2438109A DE2438109A DE2438109A1 DE 2438109 A1 DE2438109 A1 DE 2438109A1 DE 2438109 A DE2438109 A DE 2438109A DE 2438109 A DE2438109 A DE 2438109A DE 2438109 A1 DE2438109 A1 DE 2438109A1
Authority
DE
Germany
Prior art keywords
openings
masking layer
semiconductor
islands
dopant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE2438109A
Other languages
German (de)
English (en)
Inventor
Alain Gerard Monfret
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE2438109A1 publication Critical patent/DE2438109A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/83—FETs having PN junction gate electrodes
    • H10D30/831—Vertical FETs having PN junction gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/026—Deposition thru hole in mask
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/053—Field effect transistors fets
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking

Landscapes

  • Junction Field-Effect Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
DE2438109A 1973-08-21 1974-08-08 Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte halbleiteranordnung Withdrawn DE2438109A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7330278A FR2241875B1 (enExample) 1973-08-21 1973-08-21

Publications (1)

Publication Number Publication Date
DE2438109A1 true DE2438109A1 (de) 1975-02-27

Family

ID=9124148

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2438109A Withdrawn DE2438109A1 (de) 1973-08-21 1974-08-08 Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte halbleiteranordnung

Country Status (8)

Country Link
US (1) US3951694A (enExample)
JP (1) JPS5223232B2 (enExample)
CA (1) CA1008974A (enExample)
DE (1) DE2438109A1 (enExample)
FR (1) FR2241875B1 (enExample)
GB (1) GB1479974A (enExample)
IT (1) IT1020027B (enExample)
NL (1) NL7410978A (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2460037A1 (fr) * 1979-06-22 1981-01-16 Thomson Csf Procede d'auto-alignement de regions differemment dopees d'une structure de semi-conducteur
DE2945854A1 (de) * 1979-11-13 1981-05-21 Deutsche Itt Industries Gmbh, 7800 Freiburg Ionenimplantationsverfahren
JPS6074447U (ja) * 1983-10-28 1985-05-25 東北金属工業株式会社 密閉構造の電子装置
US4557794A (en) * 1984-05-07 1985-12-10 Rca Corporation Method for forming a void-free monocrystalline epitaxial layer on a mask
GB9326344D0 (en) * 1993-12-23 1994-02-23 Texas Instruments Ltd High voltage transistor for sub micron cmos processes
WO2014049500A1 (en) * 2012-09-25 2014-04-03 Pst Sensors (Proprietary) Limited Current switching transistor

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3413531A (en) * 1966-09-06 1968-11-26 Ion Physics Corp High frequency field effect transistor
US3431150A (en) * 1966-10-07 1969-03-04 Us Air Force Process for implanting grids in semiconductor devices
US3457632A (en) * 1966-10-07 1969-07-29 Us Air Force Process for implanting buried layers in semiconductor devices
GB1269359A (en) * 1968-08-22 1972-04-06 Atomic Energy Authority Uk Improvements in or relating to semiconductors and methods of doping semiconductors
GB1324507A (en) * 1969-12-18 1973-07-25 Mullard Ltd Methods of manufacturing a semiconductor device
US3713922A (en) * 1970-12-28 1973-01-30 Bell Telephone Labor Inc High resolution shadow masks and their preparation

Also Published As

Publication number Publication date
FR2241875A1 (enExample) 1975-03-21
IT1020027B (it) 1977-12-20
GB1479974A (en) 1977-07-13
JPS5051675A (enExample) 1975-05-08
JPS5223232B2 (enExample) 1977-06-22
FR2241875B1 (enExample) 1977-09-09
CA1008974A (en) 1977-04-19
US3951694A (en) 1976-04-20
NL7410978A (nl) 1975-02-25

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Legal Events

Date Code Title Description
OD Request for examination
8139 Disposal/non-payment of the annual fee